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riscv: sifive_u: Do not create hard-coded phandles in DT
authorBin Meng <[email protected]>
Fri, 17 May 2019 15:51:24 +0000 (08:51 -0700)
committerPalmer Dabbelt <[email protected]>
Thu, 27 Jun 2019 09:47:06 +0000 (02:47 -0700)
commit382cb4392ff8c3fa911d10da959eb8b0cbee15af
treefbc3fc52acfcc318ee44bc194368d6f4bd71921ftree | snapshot
parent2e3df911c5bb8199b72427a36ce68a8fe2decf1fcommit | diff
riscv: sifive_u: Do not create hard-coded phandles in DT

At present the cpu, plic and ethclk nodes' phandles are hard-coded
to 1/2/3 in DT. If we configure more than 1 cpu for the machine,
all cpu nodes' phandles conflict with each other as they are all 1.
Fix it by removing the hardcode.

Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Signed-off-by: Palmer Dabbelt <[email protected]>
hw/riscv/sifive_u.c diff | blob | blame | history
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