]> Git Repo - qemu.git/commit
target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks
authorPeter Collingbourne <[email protected]>
Fri, 19 Feb 2021 20:18:20 +0000 (12:18 -0800)
committerPeter Maydell <[email protected]>
Fri, 5 Mar 2021 15:17:35 +0000 (15:17 +0000)
commit2d928adf8a9148510e1b2041145b8a873f4d26df
tree7d372839f158d3e291011814bdf0259a9313c98e
parent819b3496196c2a7de89ed2372182c24053443990
target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks

Section D6.7 of the ARM ARM states:

For the purpose of determining Tag Check Fault handling, unprivileged
load and store instructions are treated as if executed at EL0 when
executed at either:
- EL1, when the Effective value of PSTATE.UAO is 0.
- EL2, when both the Effective value of HCR_EL2.{E2H, TGE} is {1, 1}
  and the Effective value of PSTATE.UAO is 0.

ARM has confirmed a defect in the pseudocode function
AArch64.TagCheckFault that makes it inconsistent with the above
wording. The remedy is to adjust references to PSTATE.EL in that
function to instead refer to AArch64.AccessUsesEL(acctype), so
that unprivileged instructions use SCTLR_EL1.TCF0 and TFSRE0_EL1.
The exception type for synchronous tag check faults remains unchanged.

This patch implements the described change by partially reverting
commits 50244cc76abc and cc97b0019bb5.

Signed-off-by: Peter Collingbourne <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: 20210219201820.2672077[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
target/arm/helper.c
target/arm/mte_helper.c
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