]> Git Repo - qemu.git/commit - target/arm/helper-a64.c
target/arm: Honour FPCR.FZ in FRECPX
authorPeter Maydell <[email protected]>
Thu, 31 May 2018 13:50:51 +0000 (14:50 +0100)
committerPeter Maydell <[email protected]>
Thu, 31 May 2018 13:50:51 +0000 (14:50 +0100)
commit2cfbf36ec07f7cac1aabb3b86f1c95c8a55424ba
tree9a2dd2594d751d43234a46d92ebac703cdbf2e1c
parenta3ac12fba028df90f7b3dbec924995c126c41022
target/arm: Honour FPCR.FZ in FRECPX

The FRECPX instructions should (like most other floating point operations)
honour the FPCR.FZ bit which specifies whether input denormals should
be flushed to zero (or FZ16 for the half-precision version).
We forgot to implement this, which doesn't affect the results (since
the calculation doesn't actually care about the mantissa bits) but did
mean we were failing to set the FPSR.IDC bit.

Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: 20180521172712[email protected]
target/arm/helper-a64.c
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