Git Repo - qemu.git/commit - target/mips/op

]> Git Repo - qemu.git/commit - target/mips/op_helper.c

author	Leon Alrae <[email protected]>
	Tue, 9 Jun 2015 16:14:13 +0000 (17:14 +0100)
committer	Leon Alrae <[email protected]>
	Fri, 12 Jun 2015 08:05:00 +0000 (09:05 +0100)
commit	284b731a6ae47b9ebabb9613e753c4d83cf75dd3
tree	24043a79d29416582fa2489c32419e111715474b	tree \| snapshot
parent	b435f3f3d174721382b55bbd0c785ec50c1796a9	commit \| diff

target-mips: extend selected CP0 registers to 64-bits in MIPS32

Extend EntryLo0, EntryLo1, LLAddr and TagLo from 32 to 64 bits in MIPS32.

Introduce gen_move_low32() function which moves low 32 bits from 64-bit
temp to GPR; it sign extends 32-bit value on MIPS64 and truncates on
MIPS32.

Signed-off-by: Leon Alrae <[email protected]>
Reviewed-by: Aurelien Jarno <[email protected]>

target-mips/cpu.h		diff \| blob \| blame \| history
target-mips/machine.c		diff \| blob \| blame \| history
target-mips/op_helper.c		diff \| blob \| blame \| history
target-mips/translate.c		diff \| blob \| blame \| history

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