]> Git Repo - qemu.git/commit
xilinx_spips: Fix CTRL register RW bits
authorPeter Crosthwaite <[email protected]>
Mon, 3 Jun 2013 16:17:43 +0000 (17:17 +0100)
committerPeter Maydell <[email protected]>
Mon, 3 Jun 2013 16:17:43 +0000 (17:17 +0100)
commit2133a5f6b8f8941a6a3734c6c1990656553de76c
tree886e8997b1b0625734040b6765b129736d59aeed
parent15408b428f5b4db56da555fbda4f1aaf40d77f4b
xilinx_spips: Fix CTRL register RW bits

The CTRL register was RAZ/WI on some of the RW bits. Even though the
function behind these bits is invalid in QEMU, they should still be
guest accessible. Fix.

Signed-off-by: Peter Crosthwaite <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Message-id: b7aaad93163ce4af0c428635804ac7b77a567b25.1369117359[email protected]
Signed-off-by: Peter Maydell <[email protected]>
hw/ssi/xilinx_spips.c
This page took 0.023714 seconds and 4 git commands to generate.