X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/fad6cb1a565bb73f83fc0e2654489457b489e436..b0f26631bc51790069b0c0b3935b20f9a54e3ab3:/softmmu_header.h diff --git a/softmmu_header.h b/softmmu_header.h index a1b3808493..6b72093a0c 100644 --- a/softmmu_header.h +++ b/softmmu_header.h @@ -1,6 +1,15 @@ /* * Software MMU support * + * Generate inline load/store functions for one MMU mode and data + * size. + * + * Generate a store function as well as signed and unsigned loads. For + * 32 and 64 bit cases, also generate floating point functions with + * the same size. + * + * Not used directly but included from softmmu_exec.h and exec-all.h. + * * Copyright (c) 2003 Fabrice Bellard * * This library is free software; you can redistribute it and/or @@ -14,8 +23,7 @@ * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA + * License along with this library; if not, see . */ #if DATA_SIZE == 8 #define SUFFIX q @@ -61,7 +69,7 @@ #if DATA_SIZE == 8 #define RES_TYPE uint64_t #else -#define RES_TYPE int +#define RES_TYPE uint32_t #endif #if ACCESS_TYPE == (NB_MMU_MODES + 1) @@ -70,153 +78,23 @@ #define ADDR_READ addr_read #endif -#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ - (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) - -static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) -{ - int res; - - asm volatile ("movl %1, %%edx\n" - "movl %1, %%eax\n" - "shrl %3, %%edx\n" - "andl %4, %%eax\n" - "andl %2, %%edx\n" - "leal %5(%%edx, %%ebp), %%edx\n" - "cmpl (%%edx), %%eax\n" - "movl %1, %%eax\n" - "je 1f\n" - "movl %6, %%edx\n" - "call %7\n" - "movl %%eax, %0\n" - "jmp 2f\n" - "1:\n" - "addl 12(%%edx), %%eax\n" -#if DATA_SIZE == 1 - "movzbl (%%eax), %0\n" -#elif DATA_SIZE == 2 - "movzwl (%%eax), %0\n" -#elif DATA_SIZE == 4 - "movl (%%eax), %0\n" +#ifndef CONFIG_TCG_PASS_AREG0 +#define ENV_PARAM +#define ENV_VAR +#define CPU_PREFIX +#define HELPER_PREFIX __ #else -#error unsupported size +#define ENV_PARAM CPUArchState *env, +#define ENV_VAR env, +#define CPU_PREFIX cpu_ +#define HELPER_PREFIX helper_ #endif - "2:\n" - : "=r" (res) - : "r" (ptr), - "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), - "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), - "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), - "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)), - "i" (CPU_MMU_INDEX), - "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX)) - : "%eax", "%ecx", "%edx", "memory", "cc"); - return res; -} - -#if DATA_SIZE <= 2 -static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) -{ - int res; - - asm volatile ("movl %1, %%edx\n" - "movl %1, %%eax\n" - "shrl %3, %%edx\n" - "andl %4, %%eax\n" - "andl %2, %%edx\n" - "leal %5(%%edx, %%ebp), %%edx\n" - "cmpl (%%edx), %%eax\n" - "movl %1, %%eax\n" - "je 1f\n" - "movl %6, %%edx\n" - "call %7\n" -#if DATA_SIZE == 1 - "movsbl %%al, %0\n" -#elif DATA_SIZE == 2 - "movswl %%ax, %0\n" -#else -#error unsupported size -#endif - "jmp 2f\n" - "1:\n" - "addl 12(%%edx), %%eax\n" -#if DATA_SIZE == 1 - "movsbl (%%eax), %0\n" -#elif DATA_SIZE == 2 - "movswl (%%eax), %0\n" -#else -#error unsupported size -#endif - "2:\n" - : "=r" (res) - : "r" (ptr), - "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), - "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), - "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), - "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)), - "i" (CPU_MMU_INDEX), - "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX)) - : "%eax", "%ecx", "%edx", "memory", "cc"); - return res; -} -#endif - -static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) -{ - asm volatile ("movl %0, %%edx\n" - "movl %0, %%eax\n" - "shrl %3, %%edx\n" - "andl %4, %%eax\n" - "andl %2, %%edx\n" - "leal %5(%%edx, %%ebp), %%edx\n" - "cmpl (%%edx), %%eax\n" - "movl %0, %%eax\n" - "je 1f\n" -#if DATA_SIZE == 1 - "movzbl %b1, %%edx\n" -#elif DATA_SIZE == 2 - "movzwl %w1, %%edx\n" -#elif DATA_SIZE == 4 - "movl %1, %%edx\n" -#else -#error unsupported size -#endif - "movl %6, %%ecx\n" - "call %7\n" - "jmp 2f\n" - "1:\n" - "addl 8(%%edx), %%eax\n" -#if DATA_SIZE == 1 - "movb %b1, (%%eax)\n" -#elif DATA_SIZE == 2 - "movw %w1, (%%eax)\n" -#elif DATA_SIZE == 4 - "movl %1, (%%eax)\n" -#else -#error unsupported size -#endif - "2:\n" - : - : "r" (ptr), -#if DATA_SIZE == 1 - "q" (v), -#else - "r" (v), -#endif - "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), - "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), - "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), - "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)), - "i" (CPU_MMU_INDEX), - "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX)) - : "%eax", "%ecx", "%edx", "memory", "cc"); -} - -#else /* generic load/store macros */ -static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) +static inline RES_TYPE +glue(glue(glue(CPU_PREFIX, ld), USUFFIX), MEMSUFFIX)(ENV_PARAM + target_ulong ptr) { int page_index; RES_TYPE res; @@ -229,7 +107,9 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) mmu_idx = CPU_MMU_INDEX; if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); + res = glue(glue(glue(HELPER_PREFIX, ld), SUFFIX), MMUSUFFIX)(ENV_VAR + addr, + mmu_idx); } else { physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); @@ -238,7 +118,9 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) } #if DATA_SIZE <= 2 -static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) +static inline int +glue(glue(glue(CPU_PREFIX, lds), SUFFIX), MEMSUFFIX)(ENV_PARAM + target_ulong ptr) { int res, page_index; target_ulong addr; @@ -250,7 +132,8 @@ static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) mmu_idx = CPU_MMU_INDEX; if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); + res = (DATA_STYPE)glue(glue(glue(HELPER_PREFIX, ld), SUFFIX), + MMUSUFFIX)(ENV_VAR addr, mmu_idx); } else { physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); @@ -263,7 +146,9 @@ static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) /* generic store macro */ -static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) +static inline void +glue(glue(glue(CPU_PREFIX, st), SUFFIX), MEMSUFFIX)(ENV_PARAM target_ulong ptr, + RES_TYPE v) { int page_index; target_ulong addr; @@ -275,7 +160,8 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE mmu_idx = CPU_MMU_INDEX; if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx); + glue(glue(glue(HELPER_PREFIX, st), SUFFIX), MMUSUFFIX)(ENV_VAR addr, v, + mmu_idx); } else { physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); @@ -284,51 +170,55 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ -#endif /* !asm */ - #if ACCESS_TYPE != (NB_MMU_MODES + 1) #if DATA_SIZE == 8 -static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) +static inline float64 glue(glue(CPU_PREFIX, ldfq), MEMSUFFIX)(ENV_PARAM + target_ulong ptr) { union { float64 d; uint64_t i; } u; - u.i = glue(ldq, MEMSUFFIX)(ptr); + u.i = glue(glue(CPU_PREFIX, ldq), MEMSUFFIX)(ENV_VAR ptr); return u.d; } -static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v) +static inline void glue(glue(CPU_PREFIX, stfq), MEMSUFFIX)(ENV_PARAM + target_ulong ptr, + float64 v) { union { float64 d; uint64_t i; } u; u.d = v; - glue(stq, MEMSUFFIX)(ptr, u.i); + glue(glue(CPU_PREFIX, stq), MEMSUFFIX)(ENV_VAR ptr, u.i); } #endif /* DATA_SIZE == 8 */ #if DATA_SIZE == 4 -static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr) +static inline float32 glue(glue(CPU_PREFIX, ldfl), MEMSUFFIX)(ENV_PARAM + target_ulong ptr) { union { float32 f; uint32_t i; } u; - u.i = glue(ldl, MEMSUFFIX)(ptr); + u.i = glue(glue(CPU_PREFIX, ldl), MEMSUFFIX)(ENV_VAR ptr); return u.f; } -static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) +static inline void glue(glue(CPU_PREFIX, stfl), MEMSUFFIX)(ENV_PARAM + target_ulong ptr, + float32 v) { union { float32 f; uint32_t i; } u; u.f = v; - glue(stl, MEMSUFFIX)(ptr, u.i); + glue(glue(CPU_PREFIX, stl), MEMSUFFIX)(ENV_VAR ptr, u.i); } #endif /* DATA_SIZE == 4 */ @@ -343,3 +233,7 @@ static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) #undef CPU_MMU_INDEX #undef MMUSUFFIX #undef ADDR_READ +#undef ENV_PARAM +#undef ENV_VAR +#undef CPU_PREFIX +#undef HELPER_PREFIX