X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/f290e4988dd8eb012de0517a1ff93df130e87da1..1c8eef0227e2942264063f22f10a06b84e0d3fa9:/hw/misc/eccmemctl.c diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c index 3de9675f64..aec447368e 100644 --- a/hw/misc/eccmemctl.c +++ b/hw/misc/eccmemctl.c @@ -22,7 +22,12 @@ * THE SOFTWARE. */ +#include "qemu/osdep.h" +#include "hw/irq.h" +#include "hw/qdev-properties.h" #include "hw/sysbus.h" +#include "migration/vmstate.h" +#include "qemu/module.h" #include "trace.h" /* There are 3 versions of this chip used in SMP sun4m systems: @@ -120,8 +125,12 @@ #define ECC_DIAG_SIZE 4 #define ECC_DIAG_MASK (ECC_DIAG_SIZE - 1) +#define TYPE_ECC_MEMCTL "eccmemctl" +#define ECC_MEMCTL(obj) OBJECT_CHECK(ECCState, (obj), TYPE_ECC_MEMCTL) + typedef struct ECCState { - SysBusDevice busdev; + SysBusDevice parent_obj; + MemoryRegion iomem, iomem_diag; qemu_irq irq; uint32_t regs[ECC_NREGS]; @@ -262,8 +271,7 @@ static const VMStateDescription vmstate_ecc = { .name ="ECC", .version_id = 3, .minimum_version_id = 3, - .minimum_version_id_old = 3, - .fields = (VMStateField []) { + .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, ECCState, ECC_NREGS), VMSTATE_BUFFER(diag, ECCState), VMSTATE_UINT32(version, ECCState), @@ -273,13 +281,14 @@ static const VMStateDescription vmstate_ecc = { static void ecc_reset(DeviceState *d) { - ECCState *s = container_of(d, ECCState, busdev.qdev); + ECCState *s = ECC_MEMCTL(d); - if (s->version == ECC_MCC) + if (s->version == ECC_MCC) { s->regs[ECC_MER] &= ECC_MER_REU; - else + } else { s->regs[ECC_MER] &= (ECC_MER_VER | ECC_MER_IMPL | ECC_MER_MRR | ECC_MER_DCI); + } s->regs[ECC_MDR] = 0x20; s->regs[ECC_MFSR] = 0; s->regs[ECC_VCR] = 0; @@ -290,44 +299,51 @@ static void ecc_reset(DeviceState *d) s->regs[ECC_ECR1] = 0; } -static int ecc_init1(SysBusDevice *dev) +static void ecc_init(Object *obj) { - ECCState *s = FROM_SYSBUS(ECCState, dev); + ECCState *s = ECC_MEMCTL(obj); + SysBusDevice *dev = SYS_BUS_DEVICE(obj); sysbus_init_irq(dev, &s->irq); - s->regs[0] = s->version; - memory_region_init_io(&s->iomem, OBJECT(dev), &ecc_mem_ops, s, "ecc", ECC_SIZE); + + memory_region_init_io(&s->iomem, obj, &ecc_mem_ops, s, "ecc", ECC_SIZE); sysbus_init_mmio(dev, &s->iomem); +} + +static void ecc_realize(DeviceState *dev, Error **errp) +{ + ECCState *s = ECC_MEMCTL(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + s->regs[0] = s->version; if (s->version == ECC_MCC) { // SS-600MP only memory_region_init_io(&s->iomem_diag, OBJECT(dev), &ecc_diag_mem_ops, s, "ecc.diag", ECC_DIAG_SIZE); - sysbus_init_mmio(dev, &s->iomem_diag); + sysbus_init_mmio(sbd, &s->iomem_diag); } - - return 0; } static Property ecc_properties[] = { - DEFINE_PROP_HEX32("version", ECCState, version, -1), + DEFINE_PROP_UINT32("version", ECCState, version, -1), DEFINE_PROP_END_OF_LIST(), }; static void ecc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = ecc_init1; + dc->realize = ecc_realize; dc->reset = ecc_reset; dc->vmsd = &vmstate_ecc; - dc->props = ecc_properties; + device_class_set_props(dc, ecc_properties); } static const TypeInfo ecc_info = { - .name = "eccmemctl", + .name = TYPE_ECC_MEMCTL, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(ECCState), + .instance_init = ecc_init, .class_init = ecc_class_init, };