X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/db895a1e6a97e919f9b86d60c969377357b05066..d5aa0c229ab5d46c1a4ff497553671cd46486749:/hw/intc/i8259_common.c diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index a3dee3809d..c2fd563b5b 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -22,6 +22,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include "qemu/osdep.h" #include "hw/i386/pc.h" #include "hw/isa/i8259_internal.h" @@ -69,13 +70,11 @@ static int pic_dispatch_post_load(void *opaque, int version_id) static void pic_common_realize(DeviceState *dev, Error **errp) { PICCommonState *s = PIC_COMMON(dev); - PICCommonClass *info = PIC_COMMON_GET_CLASS(s); - - info->init(s); + ISADevice *isa = ISA_DEVICE(dev); - isa_register_ioport(NULL, &s->base_io, s->iobase); + isa_register_ioport(isa, &s->base_io, s->iobase); if (s->elcr_addr != -1) { - isa_register_ioport(NULL, &s->elcr_io, s->elcr_addr); + isa_register_ioport(isa, &s->elcr_io, s->elcr_addr); } qdev_set_legacy_instance_id(dev, s->iobase, 1); @@ -83,23 +82,24 @@ static void pic_common_realize(DeviceState *dev, Error **errp) ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master) { - ISADevice *dev; - - dev = isa_create(bus, name); - qdev_prop_set_uint32(&dev->qdev, "iobase", master ? 0x20 : 0xa0); - qdev_prop_set_uint32(&dev->qdev, "elcr_addr", master ? 0x4d0 : 0x4d1); - qdev_prop_set_uint8(&dev->qdev, "elcr_mask", master ? 0xf8 : 0xde); - qdev_prop_set_bit(&dev->qdev, "master", master); - qdev_init_nofail(&dev->qdev); - - return dev; + DeviceState *dev; + ISADevice *isadev; + + isadev = isa_create(bus, name); + dev = DEVICE(isadev); + qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0); + qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1); + qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde); + qdev_prop_set_bit(dev, "master", master); + qdev_init_nofail(dev); + + return isadev; } static const VMStateDescription vmstate_pic_common = { .name = "i8259", .version_id = 1, .minimum_version_id = 1, - .minimum_version_id_old = 1, .pre_save = pic_dispatch_pre_save, .post_load = pic_dispatch_post_load, .fields = (VMStateField[]) { @@ -124,9 +124,9 @@ static const VMStateDescription vmstate_pic_common = { }; static Property pic_properties_common[] = { - DEFINE_PROP_HEX32("iobase", PICCommonState, iobase, -1), - DEFINE_PROP_HEX32("elcr_addr", PICCommonState, elcr_addr, -1), - DEFINE_PROP_HEX8("elcr_mask", PICCommonState, elcr_mask, -1), + DEFINE_PROP_UINT32("iobase", PICCommonState, iobase, -1), + DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr, -1), + DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask, -1), DEFINE_PROP_BIT("master", PICCommonState, master, 0, false), DEFINE_PROP_END_OF_LIST(), }; @@ -136,9 +136,15 @@ static void pic_common_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); dc->vmsd = &vmstate_pic_common; - dc->no_user = 1; dc->props = pic_properties_common; dc->realize = pic_common_realize; + /* + * Reason: unlike ordinary ISA devices, the PICs need additional + * wiring: its IRQ input lines are set up by board code, and the + * wiring of the slave to the master is hard-coded in device model + * code. + */ + dc->user_creatable = false; } static const TypeInfo pic_common_type = {