X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/9d5e77a22f1b8b502a11aa6288334c2787d8dbc8..1d914fa0af66024faee8cc6fa3043a935f95f775:/hw/pc.h diff --git a/hw/pc.h b/hw/pc.h index 9fbae20763..2e2f4e2e1b 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -2,6 +2,9 @@ #define HW_PC_H #include "qemu-common.h" +#include "ioport.h" +#include "isa.h" +#include "fdc.h" /* PC-style peripherals (also used by other machines). */ @@ -11,18 +14,15 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, CharDriverState *chr); SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, qemu_irq irq, int baudbase, - CharDriverState *chr, int ioregister); -uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr); -void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); -uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr); -void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); -uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr); -void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); + CharDriverState *chr, int ioregister, + int be); +SerialState *serial_isa_init(int index, CharDriverState *chr); +void serial_set_frequency(SerialState *s, uint32_t frequency); /* parallel.c */ typedef struct ParallelState ParallelState; -ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr); +ParallelState *parallel_init(int index, CharDriverState *chr); ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr); /* i8259.c */ @@ -32,28 +32,19 @@ extern PicState2 *isa_pic; void pic_set_irq(int irq, int level); void pic_set_irq_new(void *opaque, int irq, int level); qemu_irq *i8259_init(qemu_irq parent_irq); -void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, - void *alt_irq_opaque); int pic_read_irq(PicState2 *s); void pic_update_irq(PicState2 *s); uint32_t pic_intack_read(PicState2 *s); void pic_info(Monitor *mon); void irq_info(Monitor *mon); -/* APIC */ -typedef struct IOAPICState IOAPICState; -void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, - uint8_t delivery_mode, - uint8_t vector_num, uint8_t polarity, - uint8_t trigger_mode); -int apic_init(CPUState *env); -int apic_accept_pic_intr(CPUState *env); -void apic_deliver_pic_intr(CPUState *env, int level); -int apic_get_interrupt(CPUState *env); -IOAPICState *ioapic_init(void); -void ioapic_set_irq(void *opaque, int vector, int level); -void apic_reset_irq_delivered(void); -int apic_get_irq_delivered(void); +/* ISA */ +typedef struct isa_irq_state { + qemu_irq *i8259; + qemu_irq *ioapic; +} IsaIrqState; + +void isa_irq_handler(void *opaque, int n, int level); /* i8254.c */ @@ -85,24 +76,40 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, target_phys_addr_t base, ram_addr_t size, target_phys_addr_t mask); -/* mc146818rtc.c */ - -typedef struct RTCState RTCState; - -RTCState *rtc_init(int base, qemu_irq irq, int base_year); -RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year); -RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, - int base_year); -void rtc_set_memory(RTCState *s, int addr, int val); -void rtc_set_date(RTCState *s, const struct tm *tm); -void cmos_set_s3_resume(void); - /* pc.c */ extern int fd_bootchk; +void pc_register_ferr_irq(qemu_irq irq); +void pc_cmos_set_s3_resume(void *opaque, int irq, int level); +void pc_acpi_smi_interrupt(void *opaque, int irq, int level); + +void pc_cpus_init(const char *cpu_model); +void pc_memory_init(ram_addr_t ram_size, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename, + ram_addr_t *below_4g_mem_size_p, + ram_addr_t *above_4g_mem_size_p); +qemu_irq *pc_allocate_cpu_irq(void); +void pc_vga_init(PCIBus *pci_bus); +void pc_basic_device_init(qemu_irq *isa_irq, + FDCtrl **floppy_controller, + ISADevice **rtc_state); +void pc_init_ne2k_isa(NICInfo *nd); +#ifdef HAS_AUDIO +void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic); +#endif +void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, + const char *boot_device, DriveInfo **hd_table, + FDCtrl *floppy_controller, ISADevice *s); +void pc_pci_device_init(PCIBus *pci_bus); + void ioport_set_a20(int enable); int ioport_get_a20(void); +typedef void (*cpu_set_smm_t)(int smm, void *arg); +void cpu_smm_register(cpu_set_smm_t callback, void *arg); + /* acpi.c */ extern int acpi_enabled; extern char *acpi_tables; @@ -112,10 +119,12 @@ void acpi_bios_init(void); int acpi_table_add(const char *table_desc); /* acpi_piix.c */ + i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq); + qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, + int kvm_enabled); void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); -void piix4_acpi_system_hot_add_init(void); +void piix4_acpi_system_hot_add_init(PCIBus *bus); /* hpet.c */ extern int no_hpet; @@ -125,11 +134,13 @@ void pcspk_init(PITState *); int pcspk_audio_init(qemu_irq *pic); /* piix_pci.c */ -PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic); -void i440fx_set_smm(PCIDevice *d, int val); -int piix3_init(PCIBus *bus, int devfn); -void i440fx_init_memory_mappings(PCIDevice *d); +struct PCII440FXState; +typedef struct PCII440FXState PCII440FXState; + +PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, int ram_size); +void i440fx_init_memory_mappings(PCII440FXState *d); +/* piix4.c */ extern PCIDevice *piix4_dev; int piix4_init(PCIBus *bus, int devfn); @@ -151,19 +162,17 @@ int isa_vga_mm_init(target_phys_addr_t vram_base, void pci_cirrus_vga_init(PCIBus *bus); void isa_cirrus_vga_init(void); -/* ide.c */ -void isa_ide_init(int iobase, int iobase2, qemu_irq irq, - BlockDriverState *hd0, BlockDriverState *hd1); -void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, - int secondary_ide_enabled); -void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, - qemu_irq *pic); -void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, - qemu_irq *pic); - /* ne2000.c */ -void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd); +void isa_ne2000_init(int base, int irq, NICInfo *nd); + +/* e820 types */ +#define E820_RAM 1 +#define E820_RESERVED 2 +#define E820_ACPI 3 +#define E820_NVS 4 +#define E820_UNUSABLE 5 + +int e820_add_entry(uint64_t, uint64_t, uint32_t); -int cpu_is_bsp(CPUState *env); #endif