X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/8e9a8681dd6066e4f79ba85b59deedb4d3d11aa2..4689b77bda5187d4e2aac78bf21cc1a86502652d:/target-i386/arch_memory_mapping.c diff --git a/target-i386/arch_memory_mapping.c b/target-i386/arch_memory_mapping.c index 844893f44d..2d35f63e1e 100644 --- a/target-i386/arch_memory_mapping.c +++ b/target-i386/arch_memory_mapping.c @@ -16,7 +16,8 @@ #include "sysemu/memory_mapping.h" /* PAE Paging or IA-32e Paging */ -static void walk_pte(MemoryMappingList *list, hwaddr pte_start_addr, +static void walk_pte(MemoryMappingList *list, AddressSpace *as, + hwaddr pte_start_addr, int32_t a20_mask, target_ulong start_line_addr) { hwaddr pte_addr, start_paddr; @@ -26,7 +27,7 @@ static void walk_pte(MemoryMappingList *list, hwaddr pte_start_addr, for (i = 0; i < 512; i++) { pte_addr = (pte_start_addr + i * 8) & a20_mask; - pte = ldq_phys(pte_addr); + pte = ldq_phys(as, pte_addr); if (!(pte & PG_PRESENT_MASK)) { /* not present */ continue; @@ -38,14 +39,14 @@ static void walk_pte(MemoryMappingList *list, hwaddr pte_start_addr, continue; } - start_vaddr = start_line_addr | ((i & 0x1fff) << 12); + start_vaddr = start_line_addr | ((i & 0x1ff) << 12); memory_mapping_list_add_merge_sorted(list, start_paddr, start_vaddr, 1 << 12); } } /* 32-bit Paging */ -static void walk_pte2(MemoryMappingList *list, +static void walk_pte2(MemoryMappingList *list, AddressSpace *as, hwaddr pte_start_addr, int32_t a20_mask, target_ulong start_line_addr) { @@ -56,7 +57,7 @@ static void walk_pte2(MemoryMappingList *list, for (i = 0; i < 1024; i++) { pte_addr = (pte_start_addr + i * 4) & a20_mask; - pte = ldl_phys(pte_addr); + pte = ldl_phys(as, pte_addr); if (!(pte & PG_PRESENT_MASK)) { /* not present */ continue; @@ -75,7 +76,10 @@ static void walk_pte2(MemoryMappingList *list, } /* PAE Paging or IA-32e Paging */ -static void walk_pde(MemoryMappingList *list, hwaddr pde_start_addr, +#define PLM4_ADDR_MASK 0xffffffffff000ULL /* selects bits 51:12 */ + +static void walk_pde(MemoryMappingList *list, AddressSpace *as, + hwaddr pde_start_addr, int32_t a20_mask, target_ulong start_line_addr) { hwaddr pde_addr, pte_start_addr, start_paddr; @@ -85,7 +89,7 @@ static void walk_pde(MemoryMappingList *list, hwaddr pde_start_addr, for (i = 0; i < 512; i++) { pde_addr = (pde_start_addr + i * 8) & a20_mask; - pde = ldq_phys(pde_addr); + pde = ldq_phys(as, pde_addr); if (!(pde & PG_PRESENT_MASK)) { /* not present */ continue; @@ -105,13 +109,13 @@ static void walk_pde(MemoryMappingList *list, hwaddr pde_start_addr, continue; } - pte_start_addr = (pde & ~0xfff) & a20_mask; - walk_pte(list, pte_start_addr, a20_mask, line_addr); + pte_start_addr = (pde & PLM4_ADDR_MASK) & a20_mask; + walk_pte(list, as, pte_start_addr, a20_mask, line_addr); } } /* 32-bit Paging */ -static void walk_pde2(MemoryMappingList *list, +static void walk_pde2(MemoryMappingList *list, AddressSpace *as, hwaddr pde_start_addr, int32_t a20_mask, bool pse) { @@ -122,7 +126,7 @@ static void walk_pde2(MemoryMappingList *list, for (i = 0; i < 1024; i++) { pde_addr = (pde_start_addr + i * 4) & a20_mask; - pde = ldl_phys(pde_addr); + pde = ldl_phys(as, pde_addr); if (!(pde & PG_PRESENT_MASK)) { /* not present */ continue; @@ -148,12 +152,12 @@ static void walk_pde2(MemoryMappingList *list, } pte_start_addr = (pde & ~0xfff) & a20_mask; - walk_pte2(list, pte_start_addr, a20_mask, line_addr); + walk_pte2(list, as, pte_start_addr, a20_mask, line_addr); } } /* PAE Paging */ -static void walk_pdpe2(MemoryMappingList *list, +static void walk_pdpe2(MemoryMappingList *list, AddressSpace *as, hwaddr pdpe_start_addr, int32_t a20_mask) { hwaddr pdpe_addr, pde_start_addr; @@ -163,7 +167,7 @@ static void walk_pdpe2(MemoryMappingList *list, for (i = 0; i < 4; i++) { pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask; - pdpe = ldq_phys(pdpe_addr); + pdpe = ldq_phys(as, pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) { /* not present */ continue; @@ -171,13 +175,13 @@ static void walk_pdpe2(MemoryMappingList *list, line_addr = (((unsigned int)i & 0x3) << 30); pde_start_addr = (pdpe & ~0xfff) & a20_mask; - walk_pde(list, pde_start_addr, a20_mask, line_addr); + walk_pde(list, as, pde_start_addr, a20_mask, line_addr); } } #ifdef TARGET_X86_64 /* IA-32e Paging */ -static void walk_pdpe(MemoryMappingList *list, +static void walk_pdpe(MemoryMappingList *list, AddressSpace *as, hwaddr pdpe_start_addr, int32_t a20_mask, target_ulong start_line_addr) { @@ -188,7 +192,7 @@ static void walk_pdpe(MemoryMappingList *list, for (i = 0; i < 512; i++) { pdpe_addr = (pdpe_start_addr + i * 8) & a20_mask; - pdpe = ldq_phys(pdpe_addr); + pdpe = ldq_phys(as, pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) { /* not present */ continue; @@ -208,13 +212,13 @@ static void walk_pdpe(MemoryMappingList *list, continue; } - pde_start_addr = (pdpe & ~0xfff) & a20_mask; - walk_pde(list, pde_start_addr, a20_mask, line_addr); + pde_start_addr = (pdpe & PLM4_ADDR_MASK) & a20_mask; + walk_pde(list, as, pde_start_addr, a20_mask, line_addr); } } /* IA-32e Paging */ -static void walk_pml4e(MemoryMappingList *list, +static void walk_pml4e(MemoryMappingList *list, AddressSpace *as, hwaddr pml4e_start_addr, int32_t a20_mask) { hwaddr pml4e_addr, pdpe_start_addr; @@ -224,24 +228,28 @@ static void walk_pml4e(MemoryMappingList *list, for (i = 0; i < 512; i++) { pml4e_addr = (pml4e_start_addr + i * 8) & a20_mask; - pml4e = ldq_phys(pml4e_addr); + pml4e = ldq_phys(as, pml4e_addr); if (!(pml4e & PG_PRESENT_MASK)) { /* not present */ continue; } line_addr = ((i & 0x1ffULL) << 39) | (0xffffULL << 48); - pdpe_start_addr = (pml4e & ~0xfff) & a20_mask; - walk_pdpe(list, pdpe_start_addr, a20_mask, line_addr); + pdpe_start_addr = (pml4e & PLM4_ADDR_MASK) & a20_mask; + walk_pdpe(list, as, pdpe_start_addr, a20_mask, line_addr); } } #endif -int cpu_get_memory_mapping(MemoryMappingList *list, CPUArchState *env) +void x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list, + Error **errp) { - if (!cpu_paging_enabled(env)) { + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; + + if (!cpu_paging_enabled(cs)) { /* paging is disabled */ - return 0; + return; } if (env->cr[4] & CR4_PAE_MASK) { @@ -249,15 +257,15 @@ int cpu_get_memory_mapping(MemoryMappingList *list, CPUArchState *env) if (env->hflags & HF_LMA_MASK) { hwaddr pml4e_addr; - pml4e_addr = (env->cr[3] & ~0xfff) & env->a20_mask; - walk_pml4e(list, pml4e_addr, env->a20_mask); + pml4e_addr = (env->cr[3] & PLM4_ADDR_MASK) & env->a20_mask; + walk_pml4e(list, cs->as, pml4e_addr, env->a20_mask); } else #endif { hwaddr pdpe_addr; pdpe_addr = (env->cr[3] & ~0x1f) & env->a20_mask; - walk_pdpe2(list, pdpe_addr, env->a20_mask); + walk_pdpe2(list, cs->as, pdpe_addr, env->a20_mask); } } else { hwaddr pde_addr; @@ -265,13 +273,7 @@ int cpu_get_memory_mapping(MemoryMappingList *list, CPUArchState *env) pde_addr = (env->cr[3] & ~0xfff) & env->a20_mask; pse = !!(env->cr[4] & CR4_PSE_MASK); - walk_pde2(list, pde_addr, env->a20_mask, pse); + walk_pde2(list, cs->as, pde_addr, env->a20_mask, pse); } - - return 0; } -bool cpu_paging_enabled(CPUArchState *env) -{ - return env->cr[0] & CR0_PG_MASK; -}