X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/84108e128e0245dc1ff9c0aa064e9cfe2316b32d..2ff6458116546ced7ce00cc39423ee30b1477e67:/hw/isa_mmio.c

diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c
index 66bdd2cef6..fd755ab4a8 100644
--- a/hw/isa_mmio.c
+++ b/hw/isa_mmio.c
@@ -24,6 +24,7 @@
 
 #include "hw.h"
 #include "isa.h"
+#include "exec-memory.h"
 
 static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
                                   uint32_t val)
@@ -31,27 +32,13 @@ static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
     cpu_outb(addr & IOPORTS_MASK, val);
 }
 
-static void isa_mmio_writew_be(void *opaque, target_phys_addr_t addr,
+static void isa_mmio_writew(void *opaque, target_phys_addr_t addr,
                                uint32_t val)
 {
-    val = bswap16(val);
     cpu_outw(addr & IOPORTS_MASK, val);
 }
 
-static void isa_mmio_writew_le(void *opaque, target_phys_addr_t addr,
-                               uint32_t val)
-{
-    cpu_outw(addr & IOPORTS_MASK, val);
-}
-
-static void isa_mmio_writel_be(void *opaque, target_phys_addr_t addr,
-                               uint32_t val)
-{
-    val = bswap32(val);
-    cpu_outl(addr & IOPORTS_MASK, val);
-}
-
-static void isa_mmio_writel_le(void *opaque, target_phys_addr_t addr,
+static void isa_mmio_writel(void *opaque, target_phys_addr_t addr,
                                uint32_t val)
 {
     cpu_outl(addr & IOPORTS_MASK, val);
@@ -59,84 +46,36 @@ static void isa_mmio_writel_le(void *opaque, target_phys_addr_t addr,
 
 static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
 {
-    uint32_t val;
-
-    val = cpu_inb(addr & IOPORTS_MASK);
-    return val;
+    return cpu_inb(addr & IOPORTS_MASK);
 }
 
-static uint32_t isa_mmio_readw_be(void *opaque, target_phys_addr_t addr)
+static uint32_t isa_mmio_readw(void *opaque, target_phys_addr_t addr)
 {
-    uint32_t val;
-
-    val = cpu_inw(addr & IOPORTS_MASK);
-    val = bswap16(val);
-    return val;
+    return cpu_inw(addr & IOPORTS_MASK);
 }
 
-static uint32_t isa_mmio_readw_le(void *opaque, target_phys_addr_t addr)
+static uint32_t isa_mmio_readl(void *opaque, target_phys_addr_t addr)
 {
-    uint32_t val;
-
-    val = cpu_inw(addr & IOPORTS_MASK);
-    return val;
+    return cpu_inl(addr & IOPORTS_MASK);
 }
 
-static uint32_t isa_mmio_readl_be(void *opaque, target_phys_addr_t addr)
-{
-    uint32_t val;
-
-    val = cpu_inl(addr & IOPORTS_MASK);
-    val = bswap32(val);
-    return val;
-}
+static const MemoryRegionOps isa_mmio_ops = {
+    .old_mmio = {
+        .write = { isa_mmio_writeb, isa_mmio_writew, isa_mmio_writel },
+        .read = { isa_mmio_readb, isa_mmio_readw, isa_mmio_readl, },
+    },
+    .endianness = DEVICE_LITTLE_ENDIAN,
+};
 
-static uint32_t isa_mmio_readl_le(void *opaque, target_phys_addr_t addr)
+void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size)
 {
-    uint32_t val;
-
-    val = cpu_inl(addr & IOPORTS_MASK);
-    return val;
+    memory_region_init_io(mr, &isa_mmio_ops, NULL, "isa-mmio", size);
 }
 
-static CPUWriteMemoryFunc * const isa_mmio_write_be[] = {
-    &isa_mmio_writeb,
-    &isa_mmio_writew_be,
-    &isa_mmio_writel_be,
-};
-
-static CPUReadMemoryFunc * const isa_mmio_read_be[] = {
-    &isa_mmio_readb,
-    &isa_mmio_readw_be,
-    &isa_mmio_readl_be,
-};
-
-static CPUWriteMemoryFunc * const isa_mmio_write_le[] = {
-    &isa_mmio_writeb,
-    &isa_mmio_writew_le,
-    &isa_mmio_writel_le,
-};
-
-static CPUReadMemoryFunc * const isa_mmio_read_le[] = {
-    &isa_mmio_readb,
-    &isa_mmio_readw_le,
-    &isa_mmio_readl_le,
-};
-
-static int isa_mmio_iomemtype = 0;
-
-void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size)
 {
-    if (!isa_mmio_iomemtype) {
-        if (be) {
-            isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read_be,
-                                                        isa_mmio_write_be,
-                                                        NULL);
-        } else {
-            isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read_le,
-                                                        isa_mmio_write_le,
-                                                        NULL);
-        }
-    }
-    cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
+    MemoryRegion *mr = g_malloc(sizeof(*mr));
+
+    isa_mmio_setup(mr, size);
+    memory_region_add_subregion(get_system_memory(), base, mr);
 }