X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/7e000c2e3d0ace8912e677c698ee7eb17919832a..159b6e9f144c7afdf3ad95c29d1fede9626fa8b1:/disas.c diff --git a/disas.c b/disas.c index a8cd11cd86..a46faeed80 100644 --- a/disas.c +++ b/disas.c @@ -1,12 +1,16 @@ /* General "disassemble this chunk" code. Used for debugging. */ #include "config.h" -#include "dis-asm.h" +#include "disas/bfd.h" #include "elf.h" #include #include "cpu.h" -#include "exec-all.h" -#include "disas.h" +#include "disas/disas.h" + +typedef struct CPUDebug { + struct disassemble_info info; + CPUArchState *env; +} CPUDebug; /* Filled in by elfload.c. Simplistic, but will do for now. */ struct syminfo *syminfos = NULL; @@ -33,10 +37,9 @@ target_read_memory (bfd_vma memaddr, int length, struct disassemble_info *info) { - int i; - for(i = 0; i < length; i++) { - myaddr[i] = ldub_code(memaddr + i); - } + CPUDebug *s = container_of(info, CPUDebug, info); + + cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0); return 0; } @@ -55,7 +58,7 @@ perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info) "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); } -/* This could be in a separate file, to save miniscule amounts of space +/* This could be in a separate file, to save minuscule amounts of space in statically linked executables. */ /* Just print the address is hex. This is included for completeness even @@ -68,6 +71,22 @@ generic_print_address (bfd_vma addr, struct disassemble_info *info) (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr); } +/* Print address in hex, truncated to the width of a target virtual address. */ +static void +generic_print_target_address(bfd_vma addr, struct disassemble_info *info) +{ + uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS); + generic_print_address(addr & mask, info); +} + +/* Print address in hex, truncated to the width of a host virtual address. */ +static void +generic_print_host_address(bfd_vma addr, struct disassemble_info *info) +{ + uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8)); + generic_print_address(addr & mask, info); +} + /* Just return the given address. */ int @@ -76,6 +95,21 @@ generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info) return 1; } +bfd_vma bfd_getl64 (const bfd_byte *addr) +{ + unsigned long long v; + + v = (unsigned long long) addr[0]; + v |= (unsigned long long) addr[1] << 8; + v |= (unsigned long long) addr[2] << 16; + v |= (unsigned long long) addr[3] << 24; + v |= (unsigned long long) addr[4] << 32; + v |= (unsigned long long) addr[5] << 40; + v |= (unsigned long long) addr[6] << 48; + v |= (unsigned long long) addr[7] << 56; + return (bfd_vma) v; +} + bfd_vma bfd_getl32 (const bfd_byte *addr) { unsigned long v; @@ -126,58 +160,71 @@ print_insn_thumb1(bfd_vma pc, disassemble_info *info) /* Disassemble this for me please... (debugging). 'flags' has the following values: - i386 - nonzero means 16 bit code - arm - nonzero means thumb code + i386 - 1 means 16 bit code, 2 means 64 bit code + arm - bit 0 = thumb, bit 1 = reverse endian ppc - nonzero means little endian other targets - unused */ -void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) +void target_disas(FILE *out, CPUArchState *env, target_ulong code, + target_ulong size, int flags) { target_ulong pc; int count; - struct disassemble_info disasm_info; + CPUDebug s; int (*print_insn)(bfd_vma pc, disassemble_info *info); - INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); + INIT_DISASSEMBLE_INFO(s.info, out, fprintf); - disasm_info.read_memory_func = target_read_memory; - disasm_info.buffer_vma = code; - disasm_info.buffer_length = size; + s.env = env; + s.info.read_memory_func = target_read_memory; + s.info.buffer_vma = code; + s.info.buffer_length = size; + s.info.print_address_func = generic_print_target_address; #ifdef TARGET_WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_BIG; + s.info.endian = BFD_ENDIAN_BIG; #else - disasm_info.endian = BFD_ENDIAN_LITTLE; + s.info.endian = BFD_ENDIAN_LITTLE; #endif #if defined(TARGET_I386) - if (flags == 2) - disasm_info.mach = bfd_mach_x86_64; - else if (flags == 1) - disasm_info.mach = bfd_mach_i386_i8086; - else - disasm_info.mach = bfd_mach_i386_i386; + if (flags == 2) { + s.info.mach = bfd_mach_x86_64; + } else if (flags == 1) { + s.info.mach = bfd_mach_i386_i8086; + } else { + s.info.mach = bfd_mach_i386_i386; + } print_insn = print_insn_i386; #elif defined(TARGET_ARM) - if (flags) - print_insn = print_insn_thumb1; - else - print_insn = print_insn_arm; + if (flags & 1) { + print_insn = print_insn_thumb1; + } else { + print_insn = print_insn_arm; + } + if (flags & 2) { +#ifdef TARGET_WORDS_BIGENDIAN + s.info.endian = BFD_ENDIAN_LITTLE; +#else + s.info.endian = BFD_ENDIAN_BIG; +#endif + } #elif defined(TARGET_SPARC) print_insn = print_insn_sparc; #ifdef TARGET_SPARC64 - disasm_info.mach = bfd_mach_sparc_v9b; + s.info.mach = bfd_mach_sparc_v9b; #endif #elif defined(TARGET_PPC) - if (flags >> 16) - disasm_info.endian = BFD_ENDIAN_LITTLE; + if (flags >> 16) { + s.info.endian = BFD_ENDIAN_LITTLE; + } if (flags & 0xFFFF) { /* If we have a precise definitions of the instructions set, use it */ - disasm_info.mach = flags & 0xFFFF; + s.info.mach = flags & 0xFFFF; } else { #ifdef TARGET_PPC64 - disasm_info.mach = bfd_mach_ppc64; + s.info.mach = bfd_mach_ppc64; #else - disasm_info.mach = bfd_mach_ppc; + s.info.mach = bfd_mach_ppc; #endif } print_insn = print_insn_ppc; @@ -190,14 +237,28 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) print_insn = print_insn_little_mips; #endif #elif defined(TARGET_SH4) - disasm_info.mach = bfd_mach_sh4; + s.info.mach = bfd_mach_sh4; print_insn = print_insn_sh; #elif defined(TARGET_ALPHA) - disasm_info.mach = bfd_mach_alpha; + s.info.mach = bfd_mach_alpha_ev6; print_insn = print_insn_alpha; #elif defined(TARGET_CRIS) - disasm_info.mach = bfd_mach_cris_v32; - print_insn = print_insn_crisv32; + if (flags != 32) { + s.info.mach = bfd_mach_cris_v0_v10; + print_insn = print_insn_crisv10; + } else { + s.info.mach = bfd_mach_cris_v32; + print_insn = print_insn_crisv32; + } +#elif defined(TARGET_S390X) + s.info.mach = bfd_mach_s390_64; + print_insn = print_insn_s390; +#elif defined(TARGET_MICROBLAZE) + s.info.mach = bfd_arch_microblaze; + print_insn = print_insn_microblaze; +#elif defined(TARGET_LM32) + s.info.mach = bfd_mach_lm32; + print_insn = print_insn_lm32; #else fprintf(out, "0x" TARGET_FMT_lx ": Asm output not supported on this arch\n", code); @@ -206,14 +267,14 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) for (pc = code; size > 0; pc += count, size -= count) { fprintf(out, "0x" TARGET_FMT_lx ": ", pc); - count = print_insn(pc, &disasm_info); + count = print_insn(pc, &s.info); #if 0 { int i; uint8_t b; fprintf(out, " {"); for(i = 0; i < count; i++) { - target_read_memory(pc + i, &b, 1, &disasm_info); + target_read_memory(pc + i, &b, 1, &s.info); fprintf(out, " %02x", b); } fprintf(out, " }"); @@ -222,33 +283,43 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) fprintf(out, "\n"); if (count < 0) break; + if (size < count) { + fprintf(out, + "Disassembler disagrees with translator over instruction " + "decoding\n" + "Please report this to qemu-devel@nongnu.org\n"); + break; + } } } /* Disassemble this for me please... (debugging). */ void disas(FILE *out, void *code, unsigned long size) { - unsigned long pc; + uintptr_t pc; int count; - struct disassemble_info disasm_info; + CPUDebug s; int (*print_insn)(bfd_vma pc, disassemble_info *info); - INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); + INIT_DISASSEMBLE_INFO(s.info, out, fprintf); + s.info.print_address_func = generic_print_host_address; - disasm_info.buffer = code; - disasm_info.buffer_vma = (unsigned long)code; - disasm_info.buffer_length = size; + s.info.buffer = code; + s.info.buffer_vma = (uintptr_t)code; + s.info.buffer_length = size; -#ifdef WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_BIG; +#ifdef HOST_WORDS_BIGENDIAN + s.info.endian = BFD_ENDIAN_BIG; #else - disasm_info.endian = BFD_ENDIAN_LITTLE; + s.info.endian = BFD_ENDIAN_LITTLE; #endif -#if defined(__i386__) - disasm_info.mach = bfd_mach_i386_i386; +#if defined(CONFIG_TCG_INTERPRETER) + print_insn = print_insn_tci; +#elif defined(__i386__) + s.info.mach = bfd_mach_i386_i386; print_insn = print_insn_i386; #elif defined(__x86_64__) - disasm_info.mach = bfd_mach_x86_64; + s.info.mach = bfd_mach_x86_64; print_insn = print_insn_i386; #elif defined(_ARCH_PPC) print_insn = print_insn_ppc; @@ -256,9 +327,7 @@ void disas(FILE *out, void *code, unsigned long size) print_insn = print_insn_alpha; #elif defined(__sparc__) print_insn = print_insn_sparc; -#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__) - disasm_info.mach = bfd_mach_sparc_v9b; -#endif + s.info.mach = bfd_mach_sparc_v9b; #elif defined(__arm__) print_insn = print_insn_arm; #elif defined(__MIPSEB__) @@ -271,19 +340,16 @@ void disas(FILE *out, void *code, unsigned long size) print_insn = print_insn_s390; #elif defined(__hppa__) print_insn = print_insn_hppa; +#elif defined(__ia64__) + print_insn = print_insn_ia64; #else fprintf(out, "0x%lx: Asm output not supported on this arch\n", (long) code); return; #endif - for (pc = (unsigned long)code; size > 0; pc += count, size -= count) { - fprintf(out, "0x%08lx: ", pc); -#ifdef __arm__ - /* since data is included in the code, it is better to - display code data too */ - fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc)); -#endif - count = print_insn(pc, &disasm_info); + for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) { + fprintf(out, "0x%08" PRIxPTR ": ", pc); + count = print_insn(pc, &s.info); fprintf(out, "\n"); if (count < 0) break; @@ -308,60 +374,63 @@ const char *lookup_symbol(target_ulong orig_addr) #if !defined(CONFIG_USER_ONLY) -void term_vprintf(const char *fmt, va_list ap); -void term_printf(const char *fmt, ...); +#include "monitor/monitor.h" static int monitor_disas_is_physical; -static CPUState *monitor_disas_env; static int monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info) { + CPUDebug *s = container_of(info, CPUDebug, info); + if (monitor_disas_is_physical) { - cpu_physical_memory_rw(memaddr, myaddr, length, 0); + cpu_physical_memory_read(memaddr, myaddr, length); } else { - cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0); + cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0); } return 0; } -static int monitor_fprintf(FILE *stream, const char *fmt, ...) +static int GCC_FMT_ATTR(2, 3) +monitor_fprintf(FILE *stream, const char *fmt, ...) { va_list ap; va_start(ap, fmt); - term_vprintf(fmt, ap); + monitor_vprintf((Monitor *)stream, fmt, ap); va_end(ap); return 0; } -void monitor_disas(CPUState *env, +void monitor_disas(Monitor *mon, CPUArchState *env, target_ulong pc, int nb_insn, int is_physical, int flags) { int count, i; - struct disassemble_info disasm_info; + CPUDebug s; int (*print_insn)(bfd_vma pc, disassemble_info *info); - INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf); + INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf); - monitor_disas_env = env; + s.env = env; monitor_disas_is_physical = is_physical; - disasm_info.read_memory_func = monitor_read_memory; + s.info.read_memory_func = monitor_read_memory; + s.info.print_address_func = generic_print_target_address; - disasm_info.buffer_vma = pc; + s.info.buffer_vma = pc; #ifdef TARGET_WORDS_BIGENDIAN - disasm_info.endian = BFD_ENDIAN_BIG; + s.info.endian = BFD_ENDIAN_BIG; #else - disasm_info.endian = BFD_ENDIAN_LITTLE; + s.info.endian = BFD_ENDIAN_LITTLE; #endif #if defined(TARGET_I386) - if (flags == 2) - disasm_info.mach = bfd_mach_x86_64; - else if (flags == 1) - disasm_info.mach = bfd_mach_i386_i8086; - else - disasm_info.mach = bfd_mach_i386_i386; + if (flags == 2) { + s.info.mach = bfd_mach_x86_64; + } else if (flags == 1) { + s.info.mach = bfd_mach_i386_i8086; + } else { + s.info.mach = bfd_mach_i386_i386; + } print_insn = print_insn_i386; #elif defined(TARGET_ARM) print_insn = print_insn_arm; @@ -370,13 +439,13 @@ void monitor_disas(CPUState *env, #elif defined(TARGET_SPARC) print_insn = print_insn_sparc; #ifdef TARGET_SPARC64 - disasm_info.mach = bfd_mach_sparc_v9b; + s.info.mach = bfd_mach_sparc_v9b; #endif #elif defined(TARGET_PPC) #ifdef TARGET_PPC64 - disasm_info.mach = bfd_mach_ppc64; + s.info.mach = bfd_mach_ppc64; #else - disasm_info.mach = bfd_mach_ppc; + s.info.mach = bfd_mach_ppc; #endif print_insn = print_insn_ppc; #elif defined(TARGET_M68K) @@ -387,16 +456,25 @@ void monitor_disas(CPUState *env, #else print_insn = print_insn_little_mips; #endif +#elif defined(TARGET_SH4) + s.info.mach = bfd_mach_sh4; + print_insn = print_insn_sh; +#elif defined(TARGET_S390X) + s.info.mach = bfd_mach_s390_64; + print_insn = print_insn_s390; +#elif defined(TARGET_LM32) + s.info.mach = bfd_mach_lm32; + print_insn = print_insn_lm32; #else - term_printf("0x" TARGET_FMT_lx - ": Asm output not supported on this arch\n", pc); + monitor_printf(mon, "0x" TARGET_FMT_lx + ": Asm output not supported on this arch\n", pc); return; #endif for(i = 0; i < nb_insn; i++) { - term_printf("0x" TARGET_FMT_lx ": ", pc); - count = print_insn(pc, &disasm_info); - term_printf("\n"); + monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc); + count = print_insn(pc, &s.info); + monitor_printf(mon, "\n"); if (count < 0) break; pc += count;