X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/7510454e3e74aafa2e6c50388bf24904644b6a96..10578a257d94fb59449d0b0e441990c45a036ccc:/target-m68k/op_helper.c diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c index 539d1d6724..17d0a11914 100644 --- a/target-m68k/op_helper.c +++ b/target-m68k/op_helper.c @@ -16,59 +16,40 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "qemu/osdep.h" #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/cpu_ldst.h" +#include "exec/semihost.h" #if defined(CONFIG_USER_ONLY) void m68k_cpu_do_interrupt(CPUState *cs) { - M68kCPU *cpu = M68K_CPU(cs); - CPUM68KState *env = &cpu->env; - - env->exception_index = -1; + cs->exception_index = -1; } -void do_interrupt_m68k_hardirq(CPUM68KState *env) +static inline void do_interrupt_m68k_hardirq(CPUM68KState *env) { } #else -extern int semihosting_enabled; - -#include "exec/softmmu_exec.h" - -#define MMUSUFFIX _mmu - -#define SHIFT 0 -#include "exec/softmmu_template.h" - -#define SHIFT 1 -#include "exec/softmmu_template.h" - -#define SHIFT 2 -#include "exec/softmmu_template.h" - -#define SHIFT 3 -#include "exec/softmmu_template.h" - /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -void tlb_fill(CPUM68KState *env, target_ulong addr, int is_write, int mmu_idx, +void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { - M68kCPU *cpu = m68k_env_get_cpu(env); int ret; - ret = m68k_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx); + ret = m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx); if (unlikely(ret)) { if (retaddr) { /* now we have a real cpu fault */ - cpu_restore_state(env, retaddr); + cpu_restore_state(cs, retaddr); } - cpu_loop_exit(env); + cpu_loop_exit(cs); } } @@ -82,13 +63,13 @@ static void do_rte(CPUM68KState *env) env->pc = cpu_ldl_kernel(env, sp + 4); sp |= (fmt >> 28) & 3; env->sr = fmt & 0xffff; - m68k_switch_sp(env); env->aregs[7] = sp + 8; + m68k_switch_sp(env); } static void do_interrupt_all(CPUM68KState *env, int is_hw) { - CPUState *cs; + CPUState *cs = CPU(m68k_env_get_cpu(env)); uint32_t sp; uint32_t fmt; uint32_t retaddr; @@ -98,13 +79,13 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw) retaddr = env->pc; if (!is_hw) { - switch (env->exception_index) { + switch (cs->exception_index) { case EXCP_RTE: /* Return from an exception. */ do_rte(env); return; case EXCP_HALT_INSN: - if (semihosting_enabled + if (semihosting_enabled() && (env->sr & SR_S) != 0 && (env->pc & 3) == 0 && cpu_lduw_code(env, env->pc - 4) == 0x4e71 @@ -113,25 +94,21 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw) do_m68k_semihosting(env, env->dregs[0]); return; } - cs = CPU(m68k_env_get_cpu(env)); cs->halted = 1; - env->exception_index = EXCP_HLT; - cpu_loop_exit(env); + cs->exception_index = EXCP_HLT; + cpu_loop_exit(cs); return; } - if (env->exception_index >= EXCP_TRAP0 - && env->exception_index <= EXCP_TRAP15) { + if (cs->exception_index >= EXCP_TRAP0 + && cs->exception_index <= EXCP_TRAP15) { /* Move the PC after the trap instruction. */ retaddr += 2; } } - vector = env->exception_index << 2; - - sp = env->aregs[7]; + vector = cs->exception_index << 2; fmt |= 0x40000000; - fmt |= (sp & 3) << 28; fmt |= vector << 16; fmt |= env->sr; @@ -141,6 +118,8 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw) env->sr &= ~SR_M; } m68k_switch_sp(env); + sp = env->aregs[7]; + fmt |= (sp & 3) << 28; /* ??? This could cause MMU faults. */ sp &= ~3; @@ -161,16 +140,36 @@ void m68k_cpu_do_interrupt(CPUState *cs) do_interrupt_all(env, 0); } -void do_interrupt_m68k_hardirq(CPUM68KState *env) +static inline void do_interrupt_m68k_hardirq(CPUM68KState *env) { do_interrupt_all(env, 1); } #endif +bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request) +{ + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + + if (interrupt_request & CPU_INTERRUPT_HARD + && ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) { + /* Real hardware gets the interrupt vector via an IACK cycle + at this point. Current emulated hardware doesn't rely on + this, so we provide/save the vector when the interrupt is + first signalled. */ + cs->exception_index = env->pending_vector; + do_interrupt_m68k_hardirq(env); + return true; + } + return false; +} + static void raise_exception(CPUM68KState *env, int tt) { - env->exception_index = tt; - cpu_loop_exit(env); + CPUState *cs = CPU(m68k_env_get_cpu(env)); + + cs->exception_index = tt; + cpu_loop_exit(cs); } void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)