X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/6ebbf390003270afece028facef4d9834df81a8c..1ec6d2ea991a1605b9e0898aa9b6e0a2f56c6881:/softmmu_header.h diff --git a/softmmu_header.h b/softmmu_header.h index 80eefa80fa..51bd22d96f 100644 --- a/softmmu_header.h +++ b/softmmu_header.h @@ -70,15 +70,13 @@ #define ADDR_READ addr_read #endif -DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, +DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, int mmu_idx); -void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int mmu_idx); +void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int mmu_idx); #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) -#define CPU_TLB_ENTRY_BITS 4 - static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) { int res; @@ -92,9 +90,8 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) "cmpl (%%edx), %%eax\n" "movl %1, %%eax\n" "je 1f\n" - "pushl %6\n" + "movl %6, %%edx\n" "call %7\n" - "popl %%edx\n" "movl %%eax, %0\n" "jmp 2f\n" "1:\n" @@ -135,9 +132,8 @@ static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) "cmpl (%%edx), %%eax\n" "movl %1, %%eax\n" "je 1f\n" - "pushl %6\n" + "movl %6, %%edx\n" "call %7\n" - "popl %%edx\n" #if DATA_SIZE == 1 "movsbl %%al, %0\n" #elif DATA_SIZE == 2 @@ -189,9 +185,8 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE #else #error unsupported size #endif - "pushl %6\n" + "movl %6, %%ecx\n" "call %7\n" - "popl %%eax\n" "jmp 2f\n" "1:\n" "addl 8(%%edx), %%eax\n" @@ -207,9 +202,11 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE "2:\n" : : "r" (ptr), -/* NOTE: 'q' would be needed as constraint, but we could not use it - with T1 ! */ +#if DATA_SIZE == 1 + "q" (v), +#else "r" (v), +#endif "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS), "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),