X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/62ea5b0bd38471ef114ca2e2dd7507a778701cd3..d25f89c9e91d6c46b85969922411a211a6347a7d:/hw/ptimer.c

diff --git a/hw/ptimer.c b/hw/ptimer.c
index 2abf285afe..47964a67e1 100644
--- a/hw/ptimer.c
+++ b/hw/ptimer.c
@@ -1,16 +1,17 @@
-/* 
+/*
  * General purpose implementation of a simple periodic countdown timer.
  *
  * Copyright (c) 2007 CodeSourcery.
  *
  * This code is licenced under the GNU LGPL.
  */
-#include "vl.h"
-
+#include "hw.h"
+#include "qemu-timer.h"
+#include "host-utils.h"
 
 struct ptimer_state
 {
-    int enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot.  */
+    uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot.  */
     uint64_t limit;
     uint64_t delta;
     uint32_t period_frac;
@@ -67,7 +68,7 @@ uint64_t ptimer_get_count(ptimer_state *s)
     uint64_t counter;
 
     if (s->enabled) {
-        now = qemu_get_clock(vm_clock);
+        now = qemu_get_clock_ns(vm_clock);
         /* Figure out the current counter value.  */
         if (now - s->next_event > 0
             || s->period == 0) {
@@ -77,9 +78,38 @@ uint64_t ptimer_get_count(ptimer_state *s)
         } else {
             uint64_t rem;
             uint64_t div;
+            int clz1, clz2;
+            int shift;
+
+            /* We need to divide time by period, where time is stored in
+               rem (64-bit integer) and period is stored in period/period_frac
+               (64.32 fixed point).
+              
+               Doing full precision division is hard, so scale values and
+               do a 64-bit division.  The result should be rounded down,
+               so that the rounding error never causes the timer to go
+               backwards.
+            */
 
             rem = s->next_event - now;
             div = s->period;
+
+            clz1 = clz64(rem);
+            clz2 = clz64(div);
+            shift = clz1 < clz2 ? clz1 : clz2;
+
+            rem <<= shift;
+            div <<= shift;
+            if (shift >= 32) {
+                div |= ((uint64_t)s->period_frac << (shift - 32));
+            } else {
+                if (shift != 0)
+                    div |= (s->period_frac >> (32 - shift));
+                /* Look at remaining bits of period_frac and round div up if 
+                   necessary.  */
+                if ((uint32_t)(s->period_frac << shift))
+                    div += 1;
+            }
             counter = rem / div;
         }
     } else {
@@ -92,19 +122,22 @@ void ptimer_set_count(ptimer_state *s, uint64_t count)
 {
     s->delta = count;
     if (s->enabled) {
-        s->next_event = qemu_get_clock(vm_clock);
+        s->next_event = qemu_get_clock_ns(vm_clock);
         ptimer_reload(s);
     }
 }
 
 void ptimer_run(ptimer_state *s, int oneshot)
 {
+    if (s->enabled) {
+        return;
+    }
     if (s->period == 0) {
         fprintf(stderr, "Timer with period zero, disabling\n");
         return;
     }
     s->enabled = oneshot ? 2 : 1;
-    s->next_event = qemu_get_clock(vm_clock);
+    s->next_event = qemu_get_clock_ns(vm_clock);
     ptimer_reload(s);
 }
 
@@ -126,7 +159,7 @@ void ptimer_set_period(ptimer_state *s, int64_t period)
     s->period = period;
     s->period_frac = 0;
     if (s->enabled) {
-        s->next_event = qemu_get_clock(vm_clock);
+        s->next_event = qemu_get_clock_ns(vm_clock);
         ptimer_reload(s);
     }
 }
@@ -137,7 +170,7 @@ void ptimer_set_freq(ptimer_state *s, uint32_t freq)
     s->period = 1000000000ll / freq;
     s->period_frac = (1000000000ll << 32) / freq;
     if (s->enabled) {
-        s->next_event = qemu_get_clock(vm_clock);
+        s->next_event = qemu_get_clock_ns(vm_clock);
         ptimer_reload(s);
     }
 }
@@ -150,34 +183,28 @@ void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload)
     if (reload)
         s->delta = limit;
     if (s->enabled && reload) {
-        s->next_event = qemu_get_clock(vm_clock);
+        s->next_event = qemu_get_clock_ns(vm_clock);
         ptimer_reload(s);
     }
 }
 
-void qemu_put_ptimer(QEMUFile *f, ptimer_state *s)
-{
-    qemu_put_byte(f, s->enabled);
-    qemu_put_be64s(f, &s->limit);
-    qemu_put_be64s(f, &s->delta);
-    qemu_put_be32s(f, &s->period_frac);
-    qemu_put_be64s(f, &s->period);
-    qemu_put_be64s(f, &s->last_event);
-    qemu_put_be64s(f, &s->next_event);
-    qemu_put_timer(f, s->timer);
-}
-
-void qemu_get_ptimer(QEMUFile *f, ptimer_state *s)
-{
-    s->enabled = qemu_get_byte(f);
-    qemu_get_be64s(f, &s->limit);
-    qemu_get_be64s(f, &s->delta);
-    qemu_get_be32s(f, &s->period_frac);
-    qemu_get_be64s(f, &s->period);
-    qemu_get_be64s(f, &s->last_event);
-    qemu_get_be64s(f, &s->next_event);
-    qemu_get_timer(f, s->timer);
-}
+const VMStateDescription vmstate_ptimer = {
+    .name = "ptimer",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField[]) {
+        VMSTATE_UINT8(enabled, ptimer_state),
+        VMSTATE_UINT64(limit, ptimer_state),
+        VMSTATE_UINT64(delta, ptimer_state),
+        VMSTATE_UINT32(period_frac, ptimer_state),
+        VMSTATE_INT64(period, ptimer_state),
+        VMSTATE_INT64(last_event, ptimer_state),
+        VMSTATE_INT64(next_event, ptimer_state),
+        VMSTATE_TIMER(timer, ptimer_state),
+        VMSTATE_END_OF_LIST()
+    }
+};
 
 ptimer_state *ptimer_init(QEMUBH *bh)
 {
@@ -185,7 +212,6 @@ ptimer_state *ptimer_init(QEMUBH *bh)
 
     s = (ptimer_state *)qemu_mallocz(sizeof(ptimer_state));
     s->bh = bh;
-    s->timer = qemu_new_timer(vm_clock, ptimer_tick, s);
+    s->timer = qemu_new_timer_ns(vm_clock, ptimer_tick, s);
     return s;
 }
-