X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/5dbbda340533cd7d217dcf3ab904fb353598cbde..3c3adde005ec929d7d581d495d9a0bb223e6e055:/target-sh4/cpu.h diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 95df6d2a75..49dcd9e7f3 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -37,11 +37,11 @@ #define SH_CPU_SH7750_ALL (SH_CPU_SH7750 | SH_CPU_SH7750S | SH_CPU_SH7750R) #define SH_CPU_SH7751_ALL (SH_CPU_SH7751 | SH_CPU_SH7751R) -#define CPUState struct CPUSH4State +#define CPUArchState struct CPUSH4State -#include "cpu-defs.h" +#include "exec/cpu-defs.h" -#include "softfloat.h" +#include "fpu/softfloat.h" #define TARGET_PAGE_BITS 12 /* 4k XXXXX */ @@ -184,27 +184,42 @@ typedef struct CPUSH4State { uint32_t cvr; /* Cache Version Register */ void *intc_handle; - int intr_at_halt; /* SR_BL ignored during sleep */ + int in_sleep; /* SR_BL ignored during sleep */ memory_content *movcal_backup; memory_content **movcal_backup_tail; } CPUSH4State; -CPUSH4State *cpu_sh4_init(const char *cpu_model); +#include "cpu-qom.h" + +void sh4_translate_init(void); +SuperHCPU *cpu_sh4_init(const char *cpu_model); int cpu_sh4_exec(CPUSH4State * s); int cpu_sh4_signal_handler(int host_signum, void *pinfo, void *puc); int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw, - int mmu_idx, int is_softmmu); + int mmu_idx); #define cpu_handle_mmu_fault cpu_sh4_handle_mmu_fault void do_interrupt(CPUSH4State * env); void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf); #if !defined(CONFIG_USER_ONLY) void cpu_sh4_invalidate_tlb(CPUSH4State *s); -void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr, - uint32_t mem_value); -void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr, - uint32_t mem_value); +uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, + hwaddr addr); +void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, hwaddr addr, + uint32_t mem_value); +uint32_t cpu_sh4_read_mmaped_itlb_data(CPUSH4State *s, + hwaddr addr); +void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, hwaddr addr, + uint32_t mem_value); +uint32_t cpu_sh4_read_mmaped_utlb_addr(CPUSH4State *s, + hwaddr addr); +void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, hwaddr addr, + uint32_t mem_value); +uint32_t cpu_sh4_read_mmaped_utlb_data(CPUSH4State *s, + hwaddr addr); +void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, hwaddr addr, + uint32_t mem_value); #endif int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr); @@ -216,9 +231,15 @@ static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) void cpu_load_tlb(CPUSH4State * env); -#include "softfloat.h" +static inline CPUSH4State *cpu_init(const char *cpu_model) +{ + SuperHCPU *cpu = cpu_sh4_init(cpu_model); + if (cpu == NULL) { + return NULL; + } + return &cpu->env; +} -#define cpu_init cpu_sh4_init #define cpu_exec cpu_sh4_exec #define cpu_gen_code cpu_sh4_gen_code #define cpu_signal_handler cpu_sh4_signal_handler @@ -228,13 +249,13 @@ void cpu_load_tlb(CPUSH4State * env); #define MMU_MODE0_SUFFIX _kernel #define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 -static inline int cpu_mmu_index (CPUState *env) +static inline int cpu_mmu_index (CPUSH4State *env) { return (env->sr & SR_MD) == 0 ? 1 : 0; } #if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp) { if (newsp) env->gregs[15] = newsp; @@ -242,7 +263,7 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) } #endif -#include "cpu-all.h" +#include "exec/cpu-all.h" /* Memory access type */ enum { @@ -336,7 +357,7 @@ static inline int cpu_ptel_pr (uint32_t ptel) #define TB_FLAG_PENDING_MOVCA (1 << 4) -static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, +static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc, target_ulong *cs_base, int *flags) { *pc = env->pc; @@ -349,4 +370,19 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */ } +static inline bool cpu_has_work(CPUState *cpu) +{ + CPUSH4State *env = &SUPERH_CPU(cpu)->env; + + return env->interrupt_request & CPU_INTERRUPT_HARD; +} + +#include "exec/exec-all.h" + +static inline void cpu_pc_from_tb(CPUSH4State *env, TranslationBlock *tb) +{ + env->pc = tb->pc; + env->flags = tb->flags; +} + #endif /* _CPU_SH4_H */