X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/5c16736a371525e1bafd1941b0d9a83c84cb0702..2e01c8cf4b076b05013c87723e3fc710b50a0a7a:/hw/sh_serial.c

diff --git a/hw/sh_serial.c b/hw/sh_serial.c
index 843031e8a5..2447b919b8 100644
--- a/hw/sh_serial.c
+++ b/hw/sh_serial.c
@@ -27,7 +27,6 @@
 #include "hw.h"
 #include "sh.h"
 #include "qemu-char.h"
-#include <assert.h>
 
 //#define DEBUG_SERIAL
 
@@ -167,19 +166,19 @@ static void sh_serial_ioport_write(void *opaque, uint32_t offs, uint32_t val)
         }
     }
     else {
-#if 0
         switch(offs) {
+#if 0
         case 0x0c:
             ret = s->dr;
             break;
         case 0x10:
             ret = 0;
             break;
+#endif
         case 0x1c:
-            ret = s->sptr;
-            break;
+            s->sptr = val & 0x8f;
+            return;
         }
-#endif
     }
 
     fprintf(stderr, "sh_serial: unsupported write to 0x%02x\n", offs);
@@ -259,8 +258,8 @@ static uint32_t sh_serial_ioport_read(void *opaque, uint32_t offs)
         }
     }
     else {
-#if 0
         switch(offs) {
+#if 0
         case 0x0c:
             ret = s->dr;
             break;
@@ -270,11 +269,11 @@ static uint32_t sh_serial_ioport_read(void *opaque, uint32_t offs)
         case 0x14:
             ret = s->rx_fifo[0];
             break;
+#endif
         case 0x1c:
             ret = s->sptr;
             break;
         }
-#endif
     }
 #ifdef DEBUG_SERIAL
     printf("sh_serial: read offs=0x%02x val=0x%x\n",
@@ -352,13 +351,13 @@ static void sh_serial_write (void *opaque,
     sh_serial_ioport_write(s, addr, value);
 }
 
-static CPUReadMemoryFunc *sh_serial_readfn[] = {
+static CPUReadMemoryFunc * const sh_serial_readfn[] = {
     &sh_serial_read,
     &sh_serial_read,
     &sh_serial_read,
 };
 
-static CPUWriteMemoryFunc *sh_serial_writefn[] = {
+static CPUWriteMemoryFunc * const sh_serial_writefn[] = {
     &sh_serial_write,
     &sh_serial_write,
     &sh_serial_write,
@@ -376,8 +375,6 @@ void sh_serial_init (target_phys_addr_t base, int feat,
     int s_io_memory;
 
     s = qemu_mallocz(sizeof(sh_serial_state));
-    if (!s)
-        return;
 
     s->feat = feat;
     s->flags = SH_SERIAL_FLAG_TEND | SH_SERIAL_FLAG_TDE;
@@ -397,7 +394,7 @@ void sh_serial_init (target_phys_addr_t base, int feat,
 
     sh_serial_clear_fifo(s);
 
-    s_io_memory = cpu_register_io_memory(0, sh_serial_readfn,
+    s_io_memory = cpu_register_io_memory(sh_serial_readfn,
 					 sh_serial_writefn, s);
     cpu_register_physical_memory(P4ADDR(base), 0x28, s_io_memory);
     cpu_register_physical_memory(A7ADDR(base), 0x28, s_io_memory);