X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/48e06fe0ed8c265336bb7320c3a294fd0d082c04..c10c9d96158ce4d05f4325e64c0ce6a5fcd64b8b:/target-tricore/helper.c

diff --git a/target-tricore/helper.c b/target-tricore/helper.c
index ee7f0076c0..7d96daddb1 100644
--- a/target-tricore/helper.c
+++ b/target-tricore/helper.c
@@ -15,25 +15,68 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <stdarg.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <inttypes.h>
-#include <signal.h>
+#include "qemu/osdep.h"
 
 #include "cpu.h"
 
-int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
-                                 int rw, int mmu_idx)
+enum {
+    TLBRET_DIRTY = -4,
+    TLBRET_INVALID = -3,
+    TLBRET_NOMATCH = -2,
+    TLBRET_BADADDR = -1,
+    TLBRET_MATCH = 0
+};
+
+#if defined(CONFIG_SOFTMMU)
+static int get_physical_address(CPUTriCoreState *env, hwaddr *physical,
+                                int *prot, target_ulong address,
+                                int rw, int access_type)
 {
-    return 0;
+    int ret = TLBRET_MATCH;
+
+    *physical = address & 0xFFFFFFFF;
+    *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+
+    return ret;
 }
+#endif
 
-void tricore_cpu_do_interrupt(CPUState *cs)
+/* TODO: Add exeption support*/
+static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,
+                                int rw, int tlb_error)
 {
 }
 
+int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
+                                 int rw, int mmu_idx)
+{
+    TriCoreCPU *cpu = TRICORE_CPU(cs);
+    CPUTriCoreState *env = &cpu->env;
+    hwaddr physical;
+    int prot;
+    int access_type;
+    int ret = 0;
+
+    rw &= 1;
+    access_type = ACCESS_INT;
+    ret = get_physical_address(env, &physical, &prot,
+                               address, rw, access_type);
+    qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx
+                  " prot %d\n", __func__, address, ret, physical, prot);
+
+    if (ret == TLBRET_MATCH) {
+        tlb_set_page(cs, address & TARGET_PAGE_MASK,
+                     physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
+                     mmu_idx, TARGET_PAGE_SIZE);
+        ret = 0;
+    } else if (ret < 0) {
+        raise_mmu_exception(env, address, rw, ret);
+        ret = 1;
+    }
+
+    return ret;
+}
+
 TriCoreCPU *cpu_tricore_init(const char *cpu_model)
 {
     return TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, cpu_model));
@@ -84,9 +127,9 @@ uint32_t psw_read(CPUTriCoreState *env)
 void psw_write(CPUTriCoreState *env, uint32_t val)
 {
     env->PSW_USB_C = (val & MASK_USB_C);
-    env->PSW_USB_V = (val & MASK_USB_V << 1);
-    env->PSW_USB_SV = (val & MASK_USB_SV << 2);
-    env->PSW_USB_AV = ((val & MASK_USB_AV) << 3);
-    env->PSW_USB_SAV = ((val & MASK_USB_SAV) << 4);
+    env->PSW_USB_V = (val & MASK_USB_V) << 1;
+    env->PSW_USB_SV = (val & MASK_USB_SV) << 2;
+    env->PSW_USB_AV = (val & MASK_USB_AV) << 3;
+    env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4;
     env->PSW = val;
 }