X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/46f42f2940bc6912b85d616ad6c8fcfe024153f6..b4548fcc0314f5e118ed45b5774e9cd99f9a97d3:/sparc-dis.c
diff --git a/sparc-dis.c b/sparc-dis.c
index ae633f2cf9..cdd337a738 100644
--- a/sparc-dis.c
+++ b/sparc-dis.c
@@ -23,9 +23,8 @@
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with GAS or GDB; see the file COPYING. If not, write to
- the Free Software Foundation, 51 Franklin Street - Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with GAS or GDB; see the file COPYING. If not,
+ see . */
#include
#include "dis-asm.h"
@@ -224,7 +223,6 @@ typedef struct sparc_opcode
#define RS2_G0 RS2 (~0)
static const struct sparc_opcode sparc_opcodes[];
-static const int sparc_num_opcodes;
static const char *sparc_decode_asi_v8 (int);
static const char *sparc_decode_asi_v9 (int);
@@ -257,9 +255,8 @@ static const char *sparc_decode_sparclet_cpreg (int);
for more details.
You should have received a copy of the GNU General Public License
- along with this software; see the file COPYING. If not, write to
- the Free Software Foundation, 51 Franklin Street - Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with this software; see the file COPYING. If not,
+ see . */
/* FIXME-someday: perhaps the ,a's and such should be embedded in the
instruction's name rather than the args. This would make gas faster, pinsn
@@ -2118,7 +2115,7 @@ static const arg asi_table_v8[] =
{ 0x40, "#ASI_M_VIKING_TMP1" },
{ 0x41, "#ASI_M_VIKING_TMP2" },
{ 0x4c, "#ASI_M_ACTION" },
- { 0, 0 }
+ { 0, NULL }
};
static const arg asi_table_v9[] =
@@ -2156,9 +2153,31 @@ static const arg asi_table_v9[] =
{ 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
{ 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
/* These are UltraSPARC extensions. */
+ { 0x14, "#ASI_PHYS_USE_EC"},
+ { 0x15, "#ASI_PHYS_BYPASS_EC_WITH_EBIT"},
+ { 0x45, "#ASI_LSU_CONTROL_REG"},
+ { 0x47, "#ASI_DCACHE_TAG"},
+ { 0x4a, "#ASI_UPA_CONFIG_REG"},
+ { 0x50, "#ASI_IMMU" },
+ { 0x51, "#ASI_IMMU_TSB_8KB_PTR_REG" },
+ { 0x52, "#ASI_IMMU_TSB_64KB_PTR_REG" },
+ /*{ 0x53, "#reserved?" },*/
+ { 0x54, "#ASI_ITLB_DATA_IN_REG" },
+ { 0x55, "#ASI_ITLB_DATA_ACCESS_REG" },
+ { 0x56, "#ASI_ITLB_TAG_READ_REG" },
+ { 0x57, "#ASI_IMMU_DEMAP" },
+ { 0x58, "#ASI_DMMU" },
+ { 0x59, "#ASI_DMMU_TSB_8KB_PTR_REG" },
+ { 0x5a, "#ASI_DMMU_TSB_64KB_PTR_REG" },
+ { 0x5b, "#ASI_DMMU_TSB_DIRECT_PTR_REG" },
+ { 0x5c, "#ASI_DTLB_DATA_IN_REG" },
+ { 0x5d, "#ASI_DTLB_DATA_ACCESS_REG" },
+ { 0x5e, "#ASI_DTLB_TAG_READ_REG" },
+ { 0x5f, "#ASI_DMMU_DEMAP" },
+ { 0x67, "#ASI_IC_TAG"},
/* FIXME: There are dozens of them. Not sure we want them all.
Most are for kernel building but some are for vis type stuff. */
- { 0, 0 }
+ { 0, NULL }
};
/* Return the name for ASI value VALUE or NULL if not found. */
@@ -2186,7 +2205,7 @@ static const arg membar_table[] =
{ 0x04, "#LoadStore" },
{ 0x02, "#StoreLoad" },
{ 0x01, "#LoadLoad" },
- { 0, 0 }
+ { 0, NULL }
};
/* Return the name for membar value VALUE or NULL if not found. */
@@ -2207,7 +2226,7 @@ static const arg prefetch_table[] =
{ 3, "#one_write" },
{ 4, "#page" },
{ 16, "#invalidate" },
- { 0, 0 }
+ { 0, NULL }
};
/* Return the name for prefetch value VALUE or NULL if not found. */
@@ -2229,7 +2248,7 @@ static const arg sparclet_cpreg_table[] =
{ 4, "%ccsr2" },
{ 5, "%cccrr" },
{ 6, "%ccrstr" },
- { 0, 0 }
+ { 0, NULL }
};
/* Return the name for sparclet cpreg value VALUE or NULL if not found. */
@@ -2259,9 +2278,7 @@ sparc_decode_sparclet_cpreg (int value)
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
+ along with this program; if not, see . */
/* Bitmask of v9 architectures. */
#define MASK_V9 ((1 << SPARC_OPCODE_ARCH_V9) \
@@ -2765,7 +2782,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
int found_plus = 0;
/* Nonzero means we have an annulled branch. */
- int is_annulled = 0;
+ /* int is_annulled = 0; */ /* see FIXME below */
/* Do we have an `add' or `or' instruction combining an
immediate with rs1? */
@@ -2775,15 +2792,15 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
imm_added_to_rs1 = 1;
if (X_RS1 (insn) != X_RD (insn)
- && strchr (opcode->args, 'r') != 0)
+ && strchr (opcode->args, 'r') != NULL)
/* Can't do simple format if source and dest are different. */
continue;
if (X_RS2 (insn) != X_RD (insn)
- && strchr (opcode->args, 'O') != 0)
+ && strchr (opcode->args, 'O') != NULL)
/* Can't do simple format if source and dest are different. */
continue;
- (*info->fprintf_func) (stream, opcode->name);
+ (*info->fprintf_func) (stream, "%s", opcode->name);
{
const char *s;
@@ -2801,7 +2818,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
{
case 'a':
(*info->fprintf_func) (stream, "a");
- is_annulled = 1;
+ /* is_annulled = 1; */ /* see FIXME below */
++s;
continue;
case 'N':