X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/2de295c544dda8680a82fe465c92d236d49c4d4f..1ee57de444ac7dd0cdb091fec318ba056ed173fd:/disas.c diff --git a/disas.c b/disas.c index 363c3bfb58..4e119449e8 100644 --- a/disas.c +++ b/disas.c @@ -1,5 +1,6 @@ /* General "disassemble this chunk" code. Used for debugging. */ #include "config.h" +#include "qemu-common.h" #include "disas/bfd.h" #include "elf.h" #include @@ -71,14 +72,6 @@ generic_print_address (bfd_vma addr, struct disassemble_info *info) (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr); } -/* Print address in hex, truncated to the width of a target virtual address. */ -static void -generic_print_target_address(bfd_vma addr, struct disassemble_info *info) -{ - uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS); - generic_print_address(addr & mask, info); -} - /* Print address in hex, truncated to the width of a host virtual address. */ static void generic_print_host_address(bfd_vma addr, struct disassemble_info *info) @@ -150,14 +143,6 @@ bfd_vma bfd_getb16 (const bfd_byte *addr) return (bfd_vma) v; } -#ifdef TARGET_ARM -static int -print_insn_thumb1(bfd_vma pc, disassemble_info *info) -{ - return print_insn_arm(pc | 1, info); -} -#endif - static int print_insn_objdump(bfd_vma pc, disassemble_info *info, const char *prefix) { @@ -190,7 +175,6 @@ static int print_insn_od_target(bfd_vma pc, disassemble_info *info) /* Disassemble this for me please... (debugging). 'flags' has the following values: i386 - 1 means 16 bit code, 2 means 64 bit code - arm - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64 ppc - bits 0:15 specify (optionally) the machine instruction set; bit 16 indicates little endian. other targets - unused @@ -198,6 +182,7 @@ static int print_insn_od_target(bfd_vma pc, disassemble_info *info) void target_disas(FILE *out, CPUState *cpu, target_ulong code, target_ulong size, int flags) { + CPUClass *cc = CPU_GET_CLASS(cpu); target_ulong pc; int count; CPUDebug s; @@ -208,13 +193,18 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, s.info.read_memory_func = target_read_memory; s.info.buffer_vma = code; s.info.buffer_length = size; - s.info.print_address_func = generic_print_target_address; + s.info.print_address_func = generic_print_address; #ifdef TARGET_WORDS_BIGENDIAN s.info.endian = BFD_ENDIAN_BIG; #else s.info.endian = BFD_ENDIAN_LITTLE; #endif + + if (cc->disas_set_info) { + cc->disas_set_info(cpu, &s.info); + } + #if defined(TARGET_I386) if (flags == 2) { s.info.mach = bfd_mach_x86_64; @@ -224,32 +214,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, s.info.mach = bfd_mach_i386_i386; } s.info.print_insn = print_insn_i386; -#elif defined(TARGET_ARM) - if (flags & 4) { - /* We might not be compiled with the A64 disassembler - * because it needs a C++ compiler; in that case we will - * fall through to the default print_insn_od case. - */ -#if defined(CONFIG_ARM_A64_DIS) - s.info.print_insn = print_insn_arm_a64; -#endif - } else if (flags & 1) { - s.info.print_insn = print_insn_thumb1; - } else { - s.info.print_insn = print_insn_arm; - } - if (flags & 2) { -#ifdef TARGET_WORDS_BIGENDIAN - s.info.endian = BFD_ENDIAN_LITTLE; -#else - s.info.endian = BFD_ENDIAN_BIG; -#endif - } -#elif defined(TARGET_SPARC) - s.info.print_insn = print_insn_sparc; -#ifdef TARGET_SPARC64 - s.info.mach = bfd_mach_sparc_v9b; -#endif #elif defined(TARGET_PPC) if ((flags >> 16) & 1) { s.info.endian = BFD_ENDIAN_LITTLE; @@ -266,40 +230,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, } s.info.disassembler_options = (char *)"any"; s.info.print_insn = print_insn_ppc; -#elif defined(TARGET_M68K) - s.info.print_insn = print_insn_m68k; -#elif defined(TARGET_MIPS) -#ifdef TARGET_WORDS_BIGENDIAN - s.info.print_insn = print_insn_big_mips; -#else - s.info.print_insn = print_insn_little_mips; -#endif -#elif defined(TARGET_SH4) - s.info.mach = bfd_mach_sh4; - s.info.print_insn = print_insn_sh; -#elif defined(TARGET_ALPHA) - s.info.mach = bfd_mach_alpha_ev6; - s.info.print_insn = print_insn_alpha; -#elif defined(TARGET_CRIS) - if (flags != 32) { - s.info.mach = bfd_mach_cris_v0_v10; - s.info.print_insn = print_insn_crisv10; - } else { - s.info.mach = bfd_mach_cris_v32; - s.info.print_insn = print_insn_crisv32; - } -#elif defined(TARGET_S390X) - s.info.mach = bfd_mach_s390_64; - s.info.print_insn = print_insn_s390; -#elif defined(TARGET_MICROBLAZE) - s.info.mach = bfd_arch_microblaze; - s.info.print_insn = print_insn_microblaze; -#elif defined(TARGET_MOXIE) - s.info.mach = bfd_arch_moxie; - s.info.print_insn = print_insn_moxie; -#elif defined(TARGET_LM32) - s.info.mach = bfd_mach_lm32; - s.info.print_insn = print_insn_lm32; #endif if (s.info.print_insn == NULL) { s.info.print_insn = print_insn_od_target; @@ -434,21 +364,12 @@ monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, return 0; } -static int GCC_FMT_ATTR(2, 3) -monitor_fprintf(FILE *stream, const char *fmt, ...) -{ - va_list ap; - va_start(ap, fmt); - monitor_vprintf((Monitor *)stream, fmt, ap); - va_end(ap); - return 0; -} - /* Disassembler for the monitor. See target_disas for a description of flags. */ void monitor_disas(Monitor *mon, CPUState *cpu, target_ulong pc, int nb_insn, int is_physical, int flags) { + CPUClass *cc = CPU_GET_CLASS(cpu); int count, i; CPUDebug s; @@ -457,7 +378,7 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.cpu = cpu; monitor_disas_is_physical = is_physical; s.info.read_memory_func = monitor_read_memory; - s.info.print_address_func = generic_print_target_address; + s.info.print_address_func = generic_print_address; s.info.buffer_vma = pc; @@ -466,6 +387,11 @@ void monitor_disas(Monitor *mon, CPUState *cpu, #else s.info.endian = BFD_ENDIAN_LITTLE; #endif + + if (cc->disas_set_info) { + cc->disas_set_info(cpu, &s.info); + } + #if defined(TARGET_I386) if (flags == 2) { s.info.mach = bfd_mach_x86_64; @@ -475,15 +401,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.info.mach = bfd_mach_i386_i386; } s.info.print_insn = print_insn_i386; -#elif defined(TARGET_ARM) - s.info.print_insn = print_insn_arm; -#elif defined(TARGET_ALPHA) - s.info.print_insn = print_insn_alpha; -#elif defined(TARGET_SPARC) - s.info.print_insn = print_insn_sparc; -#ifdef TARGET_SPARC64 - s.info.mach = bfd_mach_sparc_v9b; -#endif #elif defined(TARGET_PPC) if (flags & 0xFFFF) { /* If we have a precise definition of the instruction set, use it. */ @@ -499,31 +416,12 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.info.endian = BFD_ENDIAN_LITTLE; } s.info.print_insn = print_insn_ppc; -#elif defined(TARGET_M68K) - s.info.print_insn = print_insn_m68k; -#elif defined(TARGET_MIPS) -#ifdef TARGET_WORDS_BIGENDIAN - s.info.print_insn = print_insn_big_mips; -#else - s.info.print_insn = print_insn_little_mips; -#endif -#elif defined(TARGET_SH4) - s.info.mach = bfd_mach_sh4; - s.info.print_insn = print_insn_sh; -#elif defined(TARGET_S390X) - s.info.mach = bfd_mach_s390_64; - s.info.print_insn = print_insn_s390; -#elif defined(TARGET_MOXIE) - s.info.mach = bfd_arch_moxie; - s.info.print_insn = print_insn_moxie; -#elif defined(TARGET_LM32) - s.info.mach = bfd_mach_lm32; - s.info.print_insn = print_insn_lm32; -#else - monitor_printf(mon, "0x" TARGET_FMT_lx - ": Asm output not supported on this arch\n", pc); - return; #endif + if (!s.info.print_insn) { + monitor_printf(mon, "0x" TARGET_FMT_lx + ": Asm output not supported on this arch\n", pc); + return; + } for(i = 0; i < nb_insn; i++) { monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);