X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/2a221651949a8dcf74faa0989d7b0dda96a76911..41ecc72ba5932381208e151bf2d2149a0342beff:/exec.c diff --git a/exec.c b/exec.c index 1e99115abc..4e179a6f66 100644 --- a/exec.c +++ b/exec.c @@ -17,9 +17,7 @@ * License along with this library; if not, see . */ #include "config.h" -#ifdef _WIN32 -#include -#else +#ifndef _WIN32 #include #include #endif @@ -35,6 +33,7 @@ #include "hw/xen/xen.h" #include "qemu/timer.h" #include "qemu/config-file.h" +#include "qemu/error-report.h" #include "exec/memory.h" #include "sysemu/dma.h" #include "exec/address-spaces.h" @@ -381,7 +380,7 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, as = iotlb.target_as; } - if (memory_access_is_direct(mr, is_write)) { + if (xen_enabled() && memory_access_is_direct(mr, is_write)) { hwaddr page = ((addr & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE) - addr; len = MIN(page, len); } @@ -421,7 +420,7 @@ static int cpu_common_post_load(void *opaque, int version_id) /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the version_id is increased. */ cpu->interrupt_request &= ~0x01; - tlb_flush(cpu->env_ptr, 1); + tlb_flush(cpu, 1); return 0; } @@ -430,9 +429,8 @@ const VMStateDescription vmstate_cpu_common = { .name = "cpu_common", .version_id = 1, .minimum_version_id = 1, - .minimum_version_id_old = 1, .post_load = cpu_common_post_load, - .fields = (VMStateField []) { + .fields = (VMStateField[]) { VMSTATE_UINT32(halted, CPUState), VMSTATE_UINT32(interrupt_request, CPUState), VMSTATE_END_OF_LIST() @@ -486,8 +484,8 @@ void cpu_exec_init(CPUArchState *env) } cpu->cpu_index = cpu_index; cpu->numa_node = 0; - QTAILQ_INIT(&env->breakpoints); - QTAILQ_INIT(&env->watchpoints); + QTAILQ_INIT(&cpu->breakpoints); + QTAILQ_INIT(&cpu->watchpoints); #ifndef CONFIG_USER_ONLY cpu->as = &address_space_memory; cpu->thread_id = qemu_get_thread_id(); @@ -529,29 +527,29 @@ static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) #endif /* TARGET_HAS_ICE */ #if defined(CONFIG_USER_ONLY) -void cpu_watchpoint_remove_all(CPUArchState *env, int mask) +void cpu_watchpoint_remove_all(CPUState *cpu, int mask) { } -int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len, +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, int flags, CPUWatchpoint **watchpoint) { return -ENOSYS; } #else /* Add a watchpoint. */ -int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len, +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, int flags, CPUWatchpoint **watchpoint) { - target_ulong len_mask = ~(len - 1); + vaddr len_mask = ~(len - 1); CPUWatchpoint *wp; /* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */ if ((len & (len - 1)) || (addr & ~len_mask) || len == 0 || len > TARGET_PAGE_SIZE) { - fprintf(stderr, "qemu: tried to set invalid watchpoint at " - TARGET_FMT_lx ", len=" TARGET_FMT_lu "\n", addr, len); + error_report("tried to set invalid watchpoint at %" + VADDR_PRIx ", len=%" VADDR_PRIu, addr, len); return -EINVAL; } wp = g_malloc(sizeof(*wp)); @@ -561,12 +559,13 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len wp->flags = flags; /* keep all GDB-injected watchpoints in front */ - if (flags & BP_GDB) - QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry); - else - QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry); + if (flags & BP_GDB) { + QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); + } else { + QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); + } - tlb_flush_page(env, addr); + tlb_flush_page(cpu, addr); if (watchpoint) *watchpoint = wp; @@ -574,16 +573,16 @@ int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len } /* Remove a specific watchpoint. */ -int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len, +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, int flags) { - target_ulong len_mask = ~(len - 1); + vaddr len_mask = ~(len - 1); CPUWatchpoint *wp; - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { if (addr == wp->vaddr && len_mask == wp->len_mask && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) { - cpu_watchpoint_remove_by_ref(env, wp); + cpu_watchpoint_remove_by_ref(cpu, wp); return 0; } } @@ -591,29 +590,30 @@ int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len } /* Remove a specific watchpoint by reference. */ -void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint) +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) { - QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry); + QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); - tlb_flush_page(env, watchpoint->vaddr); + tlb_flush_page(cpu, watchpoint->vaddr); g_free(watchpoint); } /* Remove all matching watchpoints. */ -void cpu_watchpoint_remove_all(CPUArchState *env, int mask) +void cpu_watchpoint_remove_all(CPUState *cpu, int mask) { CPUWatchpoint *wp, *next; - QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) { - if (wp->flags & mask) - cpu_watchpoint_remove_by_ref(env, wp); + QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { + if (wp->flags & mask) { + cpu_watchpoint_remove_by_ref(cpu, wp); + } } } #endif /* Add a breakpoint. */ -int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags, +int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, CPUBreakpoint **breakpoint) { #if defined(TARGET_HAS_ICE) @@ -626,12 +626,12 @@ int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags, /* keep all GDB-injected breakpoints in front */ if (flags & BP_GDB) { - QTAILQ_INSERT_HEAD(&env->breakpoints, bp, entry); + QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry); } else { - QTAILQ_INSERT_TAIL(&env->breakpoints, bp, entry); + QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry); } - breakpoint_invalidate(ENV_GET_CPU(env), pc); + breakpoint_invalidate(cpu, pc); if (breakpoint) { *breakpoint = bp; @@ -643,14 +643,14 @@ int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags, } /* Remove a specific breakpoint. */ -int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags) +int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags) { #if defined(TARGET_HAS_ICE) CPUBreakpoint *bp; - QTAILQ_FOREACH(bp, &env->breakpoints, entry) { + QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { if (bp->pc == pc && bp->flags == flags) { - cpu_breakpoint_remove_by_ref(env, bp); + cpu_breakpoint_remove_by_ref(cpu, bp); return 0; } } @@ -661,26 +661,27 @@ int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags) } /* Remove a specific breakpoint by reference. */ -void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint) +void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint) { #if defined(TARGET_HAS_ICE) - QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry); + QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry); - breakpoint_invalidate(ENV_GET_CPU(env), breakpoint->pc); + breakpoint_invalidate(cpu, breakpoint->pc); g_free(breakpoint); #endif } /* Remove all matching breakpoints. */ -void cpu_breakpoint_remove_all(CPUArchState *env, int mask) +void cpu_breakpoint_remove_all(CPUState *cpu, int mask) { #if defined(TARGET_HAS_ICE) CPUBreakpoint *bp, *next; - QTAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) { - if (bp->flags & mask) - cpu_breakpoint_remove_by_ref(env, bp); + QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) { + if (bp->flags & mask) { + cpu_breakpoint_remove_by_ref(cpu, bp); + } } #endif } @@ -704,9 +705,8 @@ void cpu_single_step(CPUState *cpu, int enabled) #endif } -void cpu_abort(CPUArchState *env, const char *fmt, ...) +void cpu_abort(CPUState *cpu, const char *fmt, ...) { - CPUState *cpu = ENV_GET_CPU(env); va_list ap; va_list ap2; @@ -794,7 +794,7 @@ static void cpu_physical_memory_set_dirty_tracking(bool enable) in_migration = enable; } -hwaddr memory_region_section_get_iotlb(CPUArchState *env, +hwaddr memory_region_section_get_iotlb(CPUState *cpu, MemoryRegionSection *section, target_ulong vaddr, hwaddr paddr, hwaddr xlat, @@ -820,7 +820,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env, /* Make accesses to pages with watchpoints go via the watchpoint trap routines. */ - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) { /* Avoid trapping reads of pages with a write breakpoint. */ if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { @@ -1031,7 +1031,7 @@ static void *file_ram_alloc(RAMBlock *block, hpagesize = gethugepagesize(path); if (!hpagesize) { - return NULL; + goto error; } if (memory < hpagesize) { @@ -1040,7 +1040,7 @@ static void *file_ram_alloc(RAMBlock *block, if (kvm_enabled() && !kvm_has_sync_mmu()) { fprintf(stderr, "host lacks kvm mmu notifiers, -mem-path unsupported\n"); - return NULL; + goto error; } /* Make name safe to use with mkstemp by replacing '/' with '_'. */ @@ -1058,7 +1058,7 @@ static void *file_ram_alloc(RAMBlock *block, if (fd < 0) { perror("unable to create backing store for hugepages"); g_free(filename); - return NULL; + goto error; } unlink(filename); g_free(filename); @@ -1078,7 +1078,7 @@ static void *file_ram_alloc(RAMBlock *block, if (area == MAP_FAILED) { perror("file_ram_alloc: can't mmap RAM pages"); close(fd); - return (NULL); + goto error; } if (mem_prealloc) { @@ -1122,6 +1122,12 @@ static void *file_ram_alloc(RAMBlock *block, block->fd = fd; return area; + +error: + if (mem_prealloc) { + exit(1); + } + return NULL; } #else static void *file_ram_alloc(RAMBlock *block, @@ -1549,7 +1555,7 @@ static void notdirty_mem_write(void *opaque, hwaddr ram_addr, flushed */ if (!cpu_physical_memory_is_clean(ram_addr)) { CPUArchState *env = current_cpu->env_ptr; - tlb_set_dirty(env, env->mem_io_vaddr); + tlb_set_dirty(env, current_cpu->mem_io_vaddr); } } @@ -1568,34 +1574,35 @@ static const MemoryRegionOps notdirty_mem_ops = { /* Generate a debug exception if a watchpoint has been hit. */ static void check_watchpoint(int offset, int len_mask, int flags) { - CPUArchState *env = current_cpu->env_ptr; + CPUState *cpu = current_cpu; + CPUArchState *env = cpu->env_ptr; target_ulong pc, cs_base; target_ulong vaddr; CPUWatchpoint *wp; int cpu_flags; - if (env->watchpoint_hit) { + if (cpu->watchpoint_hit) { /* We re-entered the check after replacing the TB. Now raise * the debug interrupt so that is will trigger after the * current instruction. */ - cpu_interrupt(ENV_GET_CPU(env), CPU_INTERRUPT_DEBUG); + cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG); return; } - vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset; - QTAILQ_FOREACH(wp, &env->watchpoints, entry) { + vaddr = (cpu->mem_io_vaddr & TARGET_PAGE_MASK) + offset; + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { if ((vaddr == (wp->vaddr & len_mask) || (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) { wp->flags |= BP_WATCHPOINT_HIT; - if (!env->watchpoint_hit) { - env->watchpoint_hit = wp; - tb_check_watchpoint(env); + if (!cpu->watchpoint_hit) { + cpu->watchpoint_hit = wp; + tb_check_watchpoint(cpu); if (wp->flags & BP_STOP_BEFORE_ACCESS) { - env->exception_index = EXCP_DEBUG; - cpu_loop_exit(env); + cpu->exception_index = EXCP_DEBUG; + cpu_loop_exit(cpu); } else { cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); - tb_gen_code(env, pc, cs_base, cpu_flags, 1); - cpu_resume_from_signal(env, NULL); + tb_gen_code(cpu, pc, cs_base, cpu_flags, 1); + cpu_resume_from_signal(cpu, NULL); } } } else { @@ -1826,14 +1833,12 @@ static void tcg_commit(MemoryListener *listener) reset the modified entries */ /* XXX: slow ! */ CPU_FOREACH(cpu) { - CPUArchState *env = cpu->env_ptr; - /* FIXME: Disentangle the cpu.h circular files deps so we can directly get the right CPU from listener. */ if (cpu->tcg_as_listener != listener) { continue; } - tlb_flush(env, 1); + tlb_flush(cpu, 1); } } @@ -2720,11 +2725,11 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, if (l > len) l = len; phys_addr += (addr & ~TARGET_PAGE_MASK); - if (is_write) - cpu_physical_memory_write_rom(&address_space_memory, - phys_addr, buf, l); - else - cpu_physical_memory_rw(phys_addr, buf, l, is_write); + if (is_write) { + cpu_physical_memory_write_rom(cpu->as, phys_addr, buf, l); + } else { + address_space_rw(cpu->as, phys_addr, buf, l, 0); + } len -= l; buf += l; addr += l;