X-Git-Url: https://repo.jachan.dev/qemu.git/blobdiff_plain/0d65ddc3847ff3676f91907f2d6de6585d4d42fd..23fabed13645fdf66473e458f318baa63be56b22:/hw/vga.c diff --git a/hw/vga.c b/hw/vga.c index 2b7091cb62..6a1a0597d5 100644 --- a/hw/vga.c +++ b/hw/vga.c @@ -149,18 +149,16 @@ static uint32_t expand4[256]; static uint16_t expand2[256]; static uint8_t expand4to8[16]; -typedef VGACommonState VGAState; - static void vga_screen_dump(void *opaque, const char *filename); static char *screen_dump_filename; static DisplayChangeListener *screen_dump_dcl; -static void vga_dumb_update_retrace_info(VGAState *s) +static void vga_dumb_update_retrace_info(VGACommonState *s) { (void) s; } -static void vga_precise_update_retrace_info(VGAState *s) +static void vga_precise_update_retrace_info(VGACommonState *s) { int htotal_chars; int hretr_start_char; @@ -205,9 +203,9 @@ static void vga_precise_update_retrace_info(VGAState *s) r->total_chars = vtotal_lines * htotal_chars; if (r->freq) { - r->ticks_per_char = ticks_per_sec / (r->total_chars * r->freq); + r->ticks_per_char = get_ticks_per_sec() / (r->total_chars * r->freq); } else { - r->ticks_per_char = ticks_per_sec / chars_per_sec; + r->ticks_per_char = get_ticks_per_sec() / chars_per_sec; } r->vstart = vretr_start_line; @@ -233,7 +231,7 @@ static void vga_precise_update_retrace_info(VGAState *s) "dots = %d\n" "ticks/char = %lld\n" "\n", - (double) ticks_per_sec / (r->ticks_per_char * r->total_chars), + (double) get_ticks_per_sec() / (r->ticks_per_char * r->total_chars), htotal_chars, hretr_start_char, hretr_skew_chars, @@ -251,7 +249,7 @@ static void vga_precise_update_retrace_info(VGAState *s) #endif } -static uint8_t vga_precise_retrace(VGAState *s) +static uint8_t vga_precise_retrace(VGACommonState *s) { struct vga_precise_retrace *r = &s->retrace_info.precise; uint8_t val = s->st01 & ~(ST01_V_RETRACE | ST01_DISP_ENABLE); @@ -280,19 +278,28 @@ static uint8_t vga_precise_retrace(VGAState *s) } } -static uint8_t vga_dumb_retrace(VGAState *s) +static uint8_t vga_dumb_retrace(VGACommonState *s) { return s->st01 ^ (ST01_V_RETRACE | ST01_DISP_ENABLE); } +int vga_ioport_invalid(VGACommonState *s, uint32_t addr) +{ + if (s->msr & MSR_COLOR_EMULATION) { + /* Color */ + return (addr >= 0x3b0 && addr <= 0x3bf); + } else { + /* Monochrome */ + return (addr >= 0x3d0 && addr <= 0x3df); + } +} + uint32_t vga_ioport_read(void *opaque, uint32_t addr) { VGACommonState *s = opaque; int val, index; - /* check port range access depending on color/monochrome mode */ - if ((addr >= 0x3b0 && addr <= 0x3bf && (s->msr & MSR_COLOR_EMULATION)) || - (addr >= 0x3d0 && addr <= 0x3df && !(s->msr & MSR_COLOR_EMULATION))) { + if (vga_ioport_invalid(s, addr)) { val = 0xff; } else { switch(addr) { @@ -325,9 +332,9 @@ uint32_t vga_ioport_read(void *opaque, uint32_t addr) case 0x3c7: val = s->dac_state; break; - case 0x3c8: - val = s->dac_write_index; - break; + case 0x3c8: + val = s->dac_write_index; + break; case 0x3c9: val = s->palette[s->dac_read_index * 3 + s->dac_sub_index]; if (++s->dac_sub_index == 3) { @@ -384,10 +391,9 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) int index; /* check port range access depending on color/monochrome mode */ - if ((addr >= 0x3b0 && addr <= 0x3bf && (s->msr & MSR_COLOR_EMULATION)) || - (addr >= 0x3d0 && addr <= 0x3df && !(s->msr & MSR_COLOR_EMULATION))) + if (vga_ioport_invalid(s, addr)) { return; - + } #ifdef DEBUG_VGA printf("VGA: write addr=0x%04x data=0x%02x\n", addr, val); #endif @@ -481,19 +487,7 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) s->cr[7] = (s->cr[7] & ~0x10) | (val & 0x10); return; } - switch(s->cr_index) { - case 0x01: /* horizontal display end */ - case 0x07: - case 0x09: - case 0x0c: - case 0x0d: - case 0x12: /* vertical display end */ - s->cr[s->cr_index] = val; - break; - default: - s->cr[s->cr_index] = val; - break; - } + s->cr[s->cr_index] = val; switch(s->cr_index) { case 0x00: @@ -517,7 +511,7 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val) #ifdef CONFIG_BOCHS_VBE static uint32_t vbe_ioport_read_index(void *opaque, uint32_t addr) { - VGAState *s = opaque; + VGACommonState *s = opaque; uint32_t val; val = s->vbe_index; return val; @@ -525,7 +519,7 @@ static uint32_t vbe_ioport_read_index(void *opaque, uint32_t addr) static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr) { - VGAState *s = opaque; + VGACommonState *s = opaque; uint32_t val; if (s->vbe_index <= VBE_DISPI_INDEX_NB) { @@ -559,13 +553,13 @@ static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr) static void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val) { - VGAState *s = opaque; + VGACommonState *s = opaque; s->vbe_index = val; } static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) { - VGAState *s = opaque; + VGACommonState *s = opaque; if (s->vbe_index <= VBE_DISPI_INDEX_NB) { #ifdef DEBUG_BOCHS_VBE @@ -711,7 +705,7 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val) /* called for accesses between 0xa0000 and 0xc0000 */ uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr) { - VGAState *s = opaque; + VGACommonState *s = opaque; int memory_map_mode, plane; uint32_t ret; @@ -798,7 +792,7 @@ static uint32_t vga_mem_readl(void *opaque, target_phys_addr_t addr) /* called for accesses between 0xa0000 and 0xc0000 */ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) { - VGAState *s = opaque; + VGACommonState *s = opaque; int memory_map_mode, plane, write_mode, b, func_select, mask; uint32_t write_mask, bit_mask, set_mask; @@ -962,7 +956,7 @@ typedef void vga_draw_glyph8_func(uint8_t *d, int linesize, typedef void vga_draw_glyph9_func(uint8_t *d, int linesize, const uint8_t *font_ptr, int h, uint32_t fgcol, uint32_t bgcol, int dup9); -typedef void vga_draw_line_func(VGAState *s1, uint8_t *d, +typedef void vga_draw_line_func(VGACommonState *s1, uint8_t *d, const uint8_t *s, int width); #define DEPTH 8 @@ -1047,7 +1041,7 @@ static unsigned int rgb_to_pixel32bgr_dup(unsigned int r, unsigned int g, unsign } /* return true if the palette was modified */ -static int update_palette16(VGAState *s) +static int update_palette16(VGACommonState *s) { int full_update, i; uint32_t v, col, *palette; @@ -1073,7 +1067,7 @@ static int update_palette16(VGAState *s) } /* return true if the palette was modified */ -static int update_palette256(VGAState *s) +static int update_palette256(VGACommonState *s) { int full_update, i; uint32_t v, col, *palette; @@ -1100,7 +1094,7 @@ static int update_palette256(VGAState *s) return full_update; } -static void vga_get_offsets(VGAState *s, +static void vga_get_offsets(VGACommonState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare) @@ -1132,7 +1126,7 @@ static void vga_get_offsets(VGAState *s, } /* update start_addr and line_offset. Return TRUE if modified */ -static int update_basic_params(VGAState *s) +static int update_basic_params(VGACommonState *s) { int full_update; uint32_t start_addr, line_offset, line_compare; @@ -1221,7 +1215,7 @@ static const uint8_t cursor_glyph[32 * 4] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, }; -static void vga_get_text_resolution(VGAState *s, int *pwidth, int *pheight, +static void vga_get_text_resolution(VGACommonState *s, int *pwidth, int *pheight, int *pcwidth, int *pcheight) { int width, cwidth, height, cheight; @@ -1270,12 +1264,12 @@ static rgb_to_pixel_dup_func *rgb_to_pixel_dup_table[NB_DEPTHS] = { * - underline * - flashing */ -static void vga_draw_text(VGAState *s, int full_update) +static void vga_draw_text(VGACommonState *s, int full_update) { int cx, cy, cheight, cw, ch, cattr, height, width, ch_attr; - int cx_min, cx_max, linesize, x_incr; + int cx_min, cx_max, linesize, x_incr, line, line1; uint32_t offset, fgcol, bgcol, v, cursor_offset; - uint8_t *d1, *d, *src, *s1, *dest, *cursor_ptr; + uint8_t *d1, *d, *src, *dest, *cursor_ptr; const uint8_t *font_ptr, *font_base[2]; int dup9, line_offset, depth_index; uint32_t *palette; @@ -1307,10 +1301,8 @@ static void vga_draw_text(VGAState *s, int full_update) full_update |= update_basic_params(s); line_offset = s->line_offset; - s1 = s->vram_ptr + (s->start_addr * 4); vga_get_text_resolution(s, &width, &height, &cw, &cheight); - x_incr = cw * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3); if ((height * width) > CH_ATTR_SIZE) { /* better than nothing: exit if transient size is too big */ return; @@ -1360,9 +1352,11 @@ static void vga_draw_text(VGAState *s, int full_update) dest = ds_get_data(s->ds); linesize = ds_get_linesize(s->ds); ch_attr_ptr = s->last_ch_attr; + line = 0; + offset = s->start_addr * 4; for(cy = 0; cy < height; cy++) { d1 = dest; - src = s1; + src = s->vram_ptr + offset; cx_min = width; cx_max = -1; for(cx = 0; cx < width; cx++) { @@ -1425,7 +1419,12 @@ static void vga_draw_text(VGAState *s, int full_update) (cx_max - cx_min + 1) * cw, cheight); } dest += linesize * cheight; - s1 += line_offset; + line1 = line + cheight; + offset += line_offset; + if (line < s->line_compare && line1 >= s->line_compare) { + offset = 0; + } + line = line1; } } @@ -1525,7 +1524,7 @@ static vga_draw_line_func *vga_draw_line_table[NB_DEPTHS * VGA_DRAW_LINE_NB] = { vga_draw_line32_16bgr, }; -static int vga_get_bpp(VGAState *s) +static int vga_get_bpp(VGACommonState *s) { int ret; #ifdef CONFIG_BOCHS_VBE @@ -1539,7 +1538,7 @@ static int vga_get_bpp(VGAState *s) return ret; } -static void vga_get_resolution(VGAState *s, int *pwidth, int *pheight) +static void vga_get_resolution(VGACommonState *s, int *pwidth, int *pheight) { int width, height; @@ -1560,7 +1559,7 @@ static void vga_get_resolution(VGAState *s, int *pwidth, int *pheight) *pheight = height; } -void vga_invalidate_scanlines(VGAState *s, int y1, int y2) +void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2) { int y; if (y1 >= VGA_MAX_HEIGHT) @@ -1572,7 +1571,7 @@ void vga_invalidate_scanlines(VGAState *s, int y1, int y2) } } -static void vga_sync_dirty_bitmap(VGAState *s) +static void vga_sync_dirty_bitmap(VGACommonState *s) { if (s->map_addr) cpu_physical_sync_dirty_bitmap(s->map_addr, s->map_end); @@ -1581,12 +1580,60 @@ static void vga_sync_dirty_bitmap(VGAState *s) cpu_physical_sync_dirty_bitmap(isa_mem_base + 0xa0000, 0xa8000); cpu_physical_sync_dirty_bitmap(isa_mem_base + 0xa8000, 0xb0000); } + +#ifdef CONFIG_BOCHS_VBE + if (s->vbe_mapped) { + cpu_physical_sync_dirty_bitmap(VBE_DISPI_LFB_PHYSICAL_ADDRESS, + VBE_DISPI_LFB_PHYSICAL_ADDRESS + s->vram_size); + } +#endif + +} + +void vga_dirty_log_start(VGACommonState *s) +{ + if (kvm_enabled() && s->map_addr) + kvm_log_start(s->map_addr, s->map_end - s->map_addr); + + if (kvm_enabled() && s->lfb_vram_mapped) { + kvm_log_start(isa_mem_base + 0xa0000, 0x8000); + kvm_log_start(isa_mem_base + 0xa8000, 0x8000); + } + +#ifdef CONFIG_BOCHS_VBE + if (kvm_enabled() && s->vbe_mapped) { + kvm_log_start(VBE_DISPI_LFB_PHYSICAL_ADDRESS, s->vram_size); + } +#endif +} + +void vga_dirty_log_stop(VGACommonState *s) +{ + if (kvm_enabled() && s->map_addr) + kvm_log_stop(s->map_addr, s->map_end - s->map_addr); + + if (kvm_enabled() && s->lfb_vram_mapped) { + kvm_log_stop(isa_mem_base + 0xa0000, 0x80000); + kvm_log_stop(isa_mem_base + 0xa8000, 0x80000); + } + +#ifdef CONFIG_BOCHS_VBE + if (kvm_enabled() && s->vbe_mapped) { + kvm_log_stop(VBE_DISPI_LFB_PHYSICAL_ADDRESS, s->vram_size); + } +#endif +} + +void vga_dirty_log_restart(VGACommonState *s) +{ + vga_dirty_log_stop(s); + vga_dirty_log_start(s); } /* * graphic modes */ -static void vga_draw_graphic(VGAState *s, int full_update) +static void vga_draw_graphic(VGACommonState *s, int full_update) { int y1, y, update, linesize, y_start, double_scan, mask, depth; int width, height, shift_control, line_offset, bwidth, bits; @@ -1803,7 +1850,7 @@ static void vga_draw_graphic(VGAState *s, int full_update) memset(s->invalidated_y_table, 0, ((height + 31) >> 5) * 4); } -static void vga_draw_blank(VGAState *s, int full_update) +static void vga_draw_blank(VGACommonState *s, int full_update) { int i, w, val; uint8_t *d; @@ -1835,14 +1882,13 @@ static void vga_draw_blank(VGAState *s, int full_update) static void vga_update_display(void *opaque) { - VGAState *s = opaque; + VGACommonState *s = opaque; int full_update, graphic_mode; if (ds_get_bits_per_pixel(s->ds) == 0) { /* nothing to do */ } else { - full_update = s->full_update; - s->full_update = 0; + full_update = 0; if (!(s->ar_index & 0x20)) { graphic_mode = GMODE_BLANK; } else { @@ -1870,9 +1916,10 @@ static void vga_update_display(void *opaque) /* force a full display refresh */ static void vga_invalidate_display(void *opaque) { - VGAState *s = opaque; + VGACommonState *s = opaque; - s->full_update = 1; + s->last_width = -1; + s->last_height = -1; } void vga_common_reset(VGACommonState *s) @@ -1944,7 +1991,7 @@ void vga_common_reset(VGACommonState *s) static void vga_reset(void *opaque) { - VGAState *s = opaque; + VGACommonState *s = opaque; vga_common_reset(s); } @@ -1956,7 +2003,7 @@ static void vga_reset(void *opaque) * instead of doing a full vga_update_display() */ static void vga_update_text(void *opaque, console_ch_t *chardata) { - VGAState *s = opaque; + VGACommonState *s = opaque; int graphic_mode, i, cursor_offset, cursor_visible; int cw, cheight, width, height, size, c_min, c_max; uint32_t *src; @@ -2114,164 +2161,68 @@ static void vga_update_text(void *opaque, console_ch_t *chardata) dpy_update(s->ds, 0, 0, s->last_width, height); } -static CPUReadMemoryFunc * const vga_mem_read[3] = { +CPUReadMemoryFunc * const vga_mem_read[3] = { vga_mem_readb, vga_mem_readw, vga_mem_readl, }; -static CPUWriteMemoryFunc * const vga_mem_write[3] = { +CPUWriteMemoryFunc * const vga_mem_write[3] = { vga_mem_writeb, vga_mem_writew, vga_mem_writel, }; -void vga_common_save(QEMUFile *f, void *opaque) -{ - VGACommonState *s = opaque; - int i; - - qemu_put_be32s(f, &s->latch); - qemu_put_8s(f, &s->sr_index); - qemu_put_buffer(f, s->sr, 8); - qemu_put_8s(f, &s->gr_index); - qemu_put_buffer(f, s->gr, 16); - qemu_put_8s(f, &s->ar_index); - qemu_put_buffer(f, s->ar, 21); - qemu_put_be32(f, s->ar_flip_flop); - qemu_put_8s(f, &s->cr_index); - qemu_put_buffer(f, s->cr, 256); - qemu_put_8s(f, &s->msr); - qemu_put_8s(f, &s->fcr); - qemu_put_byte(f, s->st00); - qemu_put_8s(f, &s->st01); - - qemu_put_8s(f, &s->dac_state); - qemu_put_8s(f, &s->dac_sub_index); - qemu_put_8s(f, &s->dac_read_index); - qemu_put_8s(f, &s->dac_write_index); - qemu_put_buffer(f, s->dac_cache, 3); - qemu_put_buffer(f, s->palette, 768); - - qemu_put_be32(f, s->bank_offset); -#ifdef CONFIG_BOCHS_VBE - qemu_put_byte(f, 1); - qemu_put_be16s(f, &s->vbe_index); - for(i = 0; i < VBE_DISPI_INDEX_NB; i++) - qemu_put_be16s(f, &s->vbe_regs[i]); - qemu_put_be32s(f, &s->vbe_start_addr); - qemu_put_be32s(f, &s->vbe_line_offset); - qemu_put_be32s(f, &s->vbe_bank_mask); -#else - qemu_put_byte(f, 0); -#endif -} - -int vga_common_load(QEMUFile *f, void *opaque, int version_id) +static int vga_common_post_load(void *opaque, int version_id) { VGACommonState *s = opaque; - int is_vbe, i; - - if (version_id > 2) - return -EINVAL; - - qemu_get_be32s(f, &s->latch); - qemu_get_8s(f, &s->sr_index); - qemu_get_buffer(f, s->sr, 8); - qemu_get_8s(f, &s->gr_index); - qemu_get_buffer(f, s->gr, 16); - qemu_get_8s(f, &s->ar_index); - qemu_get_buffer(f, s->ar, 21); - s->ar_flip_flop=qemu_get_be32(f); - qemu_get_8s(f, &s->cr_index); - qemu_get_buffer(f, s->cr, 256); - qemu_get_8s(f, &s->msr); - qemu_get_8s(f, &s->fcr); - qemu_get_8s(f, &s->st00); - qemu_get_8s(f, &s->st01); - - qemu_get_8s(f, &s->dac_state); - qemu_get_8s(f, &s->dac_sub_index); - qemu_get_8s(f, &s->dac_read_index); - qemu_get_8s(f, &s->dac_write_index); - qemu_get_buffer(f, s->dac_cache, 3); - qemu_get_buffer(f, s->palette, 768); - - s->bank_offset=qemu_get_be32(f); - is_vbe = qemu_get_byte(f); -#ifdef CONFIG_BOCHS_VBE - if (!is_vbe) - return -EINVAL; - qemu_get_be16s(f, &s->vbe_index); - for(i = 0; i < VBE_DISPI_INDEX_NB; i++) - qemu_get_be16s(f, &s->vbe_regs[i]); - qemu_get_be32s(f, &s->vbe_start_addr); - qemu_get_be32s(f, &s->vbe_line_offset); - qemu_get_be32s(f, &s->vbe_bank_mask); -#else - if (is_vbe) - return -EINVAL; -#endif /* force refresh */ s->graphic_mode = -1; return 0; } -typedef struct PCIVGAState { - PCIDevice dev; - VGACommonState vga; -} PCIVGAState; - -static void pci_vga_save(QEMUFile *f, void *opaque) -{ - PCIVGAState *s = opaque; - - pci_device_save(&s->dev, f); - vga_common_save(f, &s->vga); -} - -static int pci_vga_load(QEMUFile *f, void *opaque, int version_id) -{ - PCIVGAState *s = opaque; - int ret; - - if (version_id > 2) - return -EINVAL; - - if (version_id >= 2) { - ret = pci_device_load(&s->dev, f); - if (ret < 0) - return ret; - } - return vga_common_load(f, &s->vga, version_id); -} - -void vga_dirty_log_start(VGAState *s) -{ - if (kvm_enabled() && s->map_addr) - kvm_log_start(s->map_addr, s->map_end - s->map_addr); - - if (kvm_enabled() && s->lfb_vram_mapped) { - kvm_log_start(isa_mem_base + 0xa0000, 0x8000); - kvm_log_start(isa_mem_base + 0xa8000, 0x8000); - } -} - -static void vga_map(PCIDevice *pci_dev, int region_num, - uint32_t addr, uint32_t size, int type) -{ - PCIVGAState *d = (PCIVGAState *)pci_dev; - VGAState *s = &d->vga; - if (region_num == PCI_ROM_SLOT) { - cpu_register_physical_memory(addr, s->bios_size, s->bios_offset); - } else { - cpu_register_physical_memory(addr, s->vram_size, s->vram_offset); - s->map_addr = addr; - s->map_end = addr + s->vram_size; - vga_dirty_log_start(s); +const VMStateDescription vmstate_vga_common = { + .name = "vga", + .version_id = 2, + .minimum_version_id = 2, + .minimum_version_id_old = 2, + .post_load = vga_common_post_load, + .fields = (VMStateField []) { + VMSTATE_UINT32(latch, VGACommonState), + VMSTATE_UINT8(sr_index, VGACommonState), + VMSTATE_PARTIAL_BUFFER(sr, VGACommonState, 8), + VMSTATE_UINT8(gr_index, VGACommonState), + VMSTATE_PARTIAL_BUFFER(gr, VGACommonState, 16), + VMSTATE_UINT8(ar_index, VGACommonState), + VMSTATE_BUFFER(ar, VGACommonState), + VMSTATE_INT32(ar_flip_flop, VGACommonState), + VMSTATE_UINT8(cr_index, VGACommonState), + VMSTATE_BUFFER(cr, VGACommonState), + VMSTATE_UINT8(msr, VGACommonState), + VMSTATE_UINT8(fcr, VGACommonState), + VMSTATE_UINT8(st00, VGACommonState), + VMSTATE_UINT8(st01, VGACommonState), + + VMSTATE_UINT8(dac_state, VGACommonState), + VMSTATE_UINT8(dac_sub_index, VGACommonState), + VMSTATE_UINT8(dac_read_index, VGACommonState), + VMSTATE_UINT8(dac_write_index, VGACommonState), + VMSTATE_BUFFER(dac_cache, VGACommonState), + VMSTATE_BUFFER(palette, VGACommonState), + + VMSTATE_INT32(bank_offset, VGACommonState), + VMSTATE_UINT8_EQUAL(is_vbe_vmstate, VGACommonState), +#ifdef CONFIG_BOCHS_VBE + VMSTATE_UINT16(vbe_index, VGACommonState), + VMSTATE_UINT16_ARRAY(vbe_regs, VGACommonState, VBE_DISPI_INDEX_NB), + VMSTATE_UINT32(vbe_start_addr, VGACommonState), + VMSTATE_UINT32(vbe_line_offset, VGACommonState), + VMSTATE_UINT32(vbe_bank_mask, VGACommonState), +#endif + VMSTATE_END_OF_LIST() } -} +}; void vga_common_init(VGACommonState *s, int vga_ram_size) { @@ -2300,6 +2251,11 @@ void vga_common_init(VGACommonState *s, int vga_ram_size) expand4to8[i] = v; } +#ifdef CONFIG_BOCHS_VBE + s->is_vbe_vmstate = 1; +#else + s->is_vbe_vmstate = 0; +#endif s->vram_offset = qemu_ram_alloc(vga_ram_size); s->vram_ptr = qemu_get_ram_ptr(s->vram_offset); s->vram_size = vga_ram_size; @@ -2321,11 +2277,10 @@ void vga_common_init(VGACommonState *s, int vga_ram_size) s->update_retrace_info = vga_precise_update_retrace_info; break; } - vga_reset(s); } /* used by both ISA and PCI */ -void vga_init(VGAState *s) +void vga_init(VGACommonState *s) { int vga_io_memory; @@ -2375,201 +2330,15 @@ void vga_init(VGAState *s) qemu_register_coalesced_mmio(isa_mem_base + 0x000a0000, 0x20000); } -/* Memory mapped interface */ -static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr) -{ - VGAState *s = opaque; - - return vga_ioport_read(s, addr >> s->it_shift) & 0xff; -} - -static void vga_mm_writeb (void *opaque, - target_phys_addr_t addr, uint32_t value) -{ - VGAState *s = opaque; - - vga_ioport_write(s, addr >> s->it_shift, value & 0xff); -} - -static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr) -{ - VGAState *s = opaque; - - return vga_ioport_read(s, addr >> s->it_shift) & 0xffff; -} - -static void vga_mm_writew (void *opaque, - target_phys_addr_t addr, uint32_t value) -{ - VGAState *s = opaque; - - vga_ioport_write(s, addr >> s->it_shift, value & 0xffff); -} - -static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr) -{ - VGAState *s = opaque; - - return vga_ioport_read(s, addr >> s->it_shift); -} - -static void vga_mm_writel (void *opaque, - target_phys_addr_t addr, uint32_t value) -{ - VGAState *s = opaque; - - vga_ioport_write(s, addr >> s->it_shift, value); -} - -static CPUReadMemoryFunc * const vga_mm_read_ctrl[] = { - &vga_mm_readb, - &vga_mm_readw, - &vga_mm_readl, -}; - -static CPUWriteMemoryFunc * const vga_mm_write_ctrl[] = { - &vga_mm_writeb, - &vga_mm_writew, - &vga_mm_writel, -}; - -static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base, - target_phys_addr_t ctrl_base, int it_shift) -{ - int s_ioport_ctrl, vga_io_memory; - - s->it_shift = it_shift; - s_ioport_ctrl = cpu_register_io_memory(vga_mm_read_ctrl, vga_mm_write_ctrl, s); - vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, s); - - register_savevm("vga", 0, 2, vga_common_save, vga_common_load, s); - - cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl); - s->bank_offset = 0; - cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory); - qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000); -} - -int isa_vga_init(void) -{ - VGAState *s; - - s = qemu_mallocz(sizeof(VGAState)); - - vga_common_init(s, VGA_RAM_SIZE); - vga_init(s); - register_savevm("vga", 0, 2, vga_common_save, vga_common_load, s); - - s->ds = graphic_console_init(s->update, s->invalidate, - s->screen_dump, s->text_update, s); - -#ifdef CONFIG_BOCHS_VBE - /* XXX: use optimized standard vga accesses */ - cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, - VGA_RAM_SIZE, s->vram_offset); -#endif - return 0; -} - -int isa_vga_mm_init(target_phys_addr_t vram_base, - target_phys_addr_t ctrl_base, int it_shift) +void vga_init_vbe(VGACommonState *s) { - VGAState *s; - - s = qemu_mallocz(sizeof(VGAState)); - - vga_common_init(s, VGA_RAM_SIZE); - vga_mm_init(s, vram_base, ctrl_base, it_shift); - - s->ds = graphic_console_init(s->update, s->invalidate, - s->screen_dump, s->text_update, s); - #ifdef CONFIG_BOCHS_VBE /* XXX: use optimized standard vga accesses */ cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS, VGA_RAM_SIZE, s->vram_offset); -#endif - return 0; -} - -static void pci_vga_write_config(PCIDevice *d, - uint32_t address, uint32_t val, int len) -{ - PCIVGAState *pvs = container_of(d, PCIVGAState, dev); - VGAState *s = &pvs->vga; - - pci_default_write_config(d, address, val, len); - if (s->map_addr && pvs->dev.io_regions[0].addr == -1) - s->map_addr = 0; -} - -static int pci_vga_initfn(PCIDevice *dev) -{ - PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev); - VGAState *s = &d->vga; - uint8_t *pci_conf = d->dev.config; - - // vga + console init - vga_common_init(s, VGA_RAM_SIZE); - vga_init(s); - register_savevm("vga", 0, 2, pci_vga_save, pci_vga_load, d); - - s->ds = graphic_console_init(s->update, s->invalidate, - s->screen_dump, s->text_update, s); - - // dummy VGA (same as Bochs ID) - pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_QEMU); - pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_QEMU_VGA); - pci_config_set_class(pci_conf, PCI_CLASS_DISPLAY_VGA); - pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type - - /* XXX: VGA_RAM_SIZE must be a power of two */ - pci_register_bar(&d->dev, 0, VGA_RAM_SIZE, - PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map); - - if (s->bios_size) { - unsigned int bios_total_size; - /* must be a power of two */ - bios_total_size = 1; - while (bios_total_size < s->bios_size) - bios_total_size <<= 1; - pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size, - PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map); - } - return 0; -} - -int pci_vga_init(PCIBus *bus, - unsigned long vga_bios_offset, int vga_bios_size) -{ - PCIDevice *dev; - - dev = pci_create("VGA", NULL); - qdev_prop_set_uint32(&dev->qdev, "bios-offset", vga_bios_offset); - qdev_prop_set_uint32(&dev->qdev, "bios-size", vga_bios_offset); - qdev_init(&dev->qdev); - - return 0; + s->vbe_mapped = 1; +#endif } - -static PCIDeviceInfo vga_info = { - .qdev.name = "VGA", - .qdev.size = sizeof(PCIVGAState), - .init = pci_vga_initfn, - .config_write = pci_vga_write_config, - .qdev.props = (Property[]) { - DEFINE_PROP_HEX32("bios-offset", PCIVGAState, vga.bios_offset, 0), - DEFINE_PROP_HEX32("bios-size", PCIVGAState, vga.bios_size, 0), - DEFINE_PROP_END_OF_LIST(), - } -}; - -static void vga_register(void) -{ - pci_qdev_register(&vga_info); -} -device_init(vga_register); - /********************************************************/ /* vga screen dump */ @@ -2644,7 +2413,7 @@ static DisplayChangeListener* vga_screen_dump_init(DisplayState *ds) available */ static void vga_screen_dump(void *opaque, const char *filename) { - VGAState *s = opaque; + VGACommonState *s = opaque; if (!screen_dump_dcl) screen_dump_dcl = vga_screen_dump_init(s->ds);