const char *name)
{
unsigned i;
- char *num_name = malloc(strlen(name) + sizeof(i) * 3 + 1);
+ GString *num_name = g_string_new(NULL);
for (i = 0; i < memory->num; ++i) {
MemoryRegion *m;
- sprintf(num_name, "%s%u", name, i);
- m = g_malloc(sizeof(*m));
- memory_region_init_ram(m, NULL, num_name,
- memory->location[i].size,
- &error_fatal);
- vmstate_register_ram_global(m);
+ g_string_printf(num_name, "%s%u", name, i);
+ m = g_new(MemoryRegion, 1);
+ memory_region_init_ram(m, NULL, num_name->str,
+ memory->location[i].size, &error_fatal);
memory_region_add_subregion(get_system_memory(),
memory->location[i].addr, m);
}
- free(num_name);
+ g_string_free(num_name, true);
}
static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
}
for (n = 0; n < smp_cpus; n++) {
- cpu = cpu_xtensa_init(cpu_model);
- if (cpu == NULL) {
- error_report("unable to find CPU definition '%s'",
- cpu_model);
- exit(EXIT_FAILURE);
- }
+ cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));
env = &cpu->env;
env->sregs[PRID] = n;
xtensa_create_memory_regions(&sysram, "xtensa.sysram");
}
+ if (serial_hds[0]) {
+ xtensa_sim_open_console(serial_hds[0]);
+ }
if (kernel_filename) {
uint64_t elf_entry;
uint64_t elf_lowaddr;
mc->is_default = true;
mc->init = xtensa_sim_init;
mc->max_cpus = 4;
+ mc->no_serial = 1;
}
DEFINE_MACHINE("sim", xtensa_sim_machine_init)