target-s390: Add format based disassassmbly infrastructure

[qemu.git] / hw / pckbd.c

diff --git a/hw/pckbd.c b/hw/pckbd.c
index e83b8a6bcb6e8446283072578d9c81820de9fe83..6db7bbcc06d1d1787c13b76f4b9f2ea6206b18cb 100644 (file)
--- a/hw/pckbd.c
+++ b/hw/pckbd.c
@@ -25,10 +25,16 @@
 #include "isa.h"
 #include "pc.h"
 #include "ps2.h"
 #include "isa.h"
 #include "pc.h"
 #include "ps2.h"

-#include "sysemu.h"
+#include "sysemu/sysemu.h"

 
 /* debug PC keyboard */
 //#define DEBUG_KBD
 
 /* debug PC keyboard */
 //#define DEBUG_KBD

+#ifdef DEBUG_KBD
+#define DPRINTF(fmt, ...)                                       \
+    do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(fmt, ...)
+#endif

 
 /*     Keyboard Controller Commands */
 #define KBD_CCMD_READ_MODE     0x20    /* Read mode bits */
 
 /*     Keyboard Controller Commands */
 #define KBD_CCMD_READ_MODE     0x20    /* Read mode bits */


@@ -50,7 +56,9 @@
 #define KBD_CCMD_WRITE_MOUSE   0xD4    /* Write the following byte to the mouse */
 #define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
 #define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
 #define KBD_CCMD_WRITE_MOUSE   0xD4    /* Write the following byte to the mouse */
 #define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
 #define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */

-#define KBD_CCMD_RESET         0xFE
+#define KBD_CCMD_PULSE_BITS_3_0 0xF0    /* Pulse bits 3-0 of the output port P2. */
+#define KBD_CCMD_RESET          0xFE    /* Pulse bit 0 of the output port P2 = CPU reset. */
+#define KBD_CCMD_NO_OP          0xFF    /* Pulse no bits of the output port P2. */

 
 /* Keyboard Commands */
 #define KBD_CMD_SET_LEDS       0xED    /* Set keyboard leds */
 
 /* Keyboard Commands */
 #define KBD_CMD_SET_LEDS       0xED    /* Set keyboard leds */


@@ -87,6 +95,12 @@
 #define KBD_MODE_KCC           0x40    /* Scan code conversion to PC format */
 #define KBD_MODE_RFU           0x80
 
 #define KBD_MODE_KCC           0x40    /* Scan code conversion to PC format */
 #define KBD_MODE_RFU           0x80
 

+/* Output Port Bits */
+#define KBD_OUT_RESET           0x01    /* 1=normal mode, 0=reset */
+#define KBD_OUT_A20             0x02    /* x86 only */
+#define KBD_OUT_OBF             0x10    /* Keyboard output buffer full */
+#define KBD_OUT_MOUSE_OBF       0x20    /* Mouse output buffer full */
+

 /* Mouse Commands */
 #define AUX_SET_SCALE11                0xE6    /* Set 1:1 scaling */
 #define AUX_SET_SCALE21                0xE7    /* Set 2:1 scaling */
 /* Mouse Commands */
 #define AUX_SET_SCALE11                0xE6    /* Set 1:1 scaling */
 #define AUX_SET_SCALE21                0xE7    /* Set 2:1 scaling */


@@ -116,6 +130,7 @@ typedef struct KBDState {
     uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
     uint8_t status;
     uint8_t mode;
     uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
     uint8_t status;
     uint8_t mode;

+    uint8_t outport;

     /* Bitmask of devices with data available.  */
     uint8_t pending;
     void *kbd;
     /* Bitmask of devices with data available.  */
     uint8_t pending;
     void *kbd;


@@ -123,7 +138,8 @@ typedef struct KBDState {
 
     qemu_irq irq_kbd;
     qemu_irq irq_mouse;
 
     qemu_irq irq_kbd;
     qemu_irq irq_mouse;

-    target_phys_addr_t mask;
+    qemu_irq *a20_out;
+    hwaddr mask;

 } KBDState;
 
 /* update irq and KBD_STAT_[MOUSE_]OBF */
 } KBDState;
 
 /* update irq and KBD_STAT_[MOUSE_]OBF */


@@ -136,11 +152,14 @@ static void kbd_update_irq(KBDState *s)
     irq_kbd_level = 0;
     irq_mouse_level = 0;
     s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
     irq_kbd_level = 0;
     irq_mouse_level = 0;
     s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);

+    s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);

     if (s->pending) {
         s->status |= KBD_STAT_OBF;
     if (s->pending) {
         s->status |= KBD_STAT_OBF;

+        s->outport |= KBD_OUT_OBF;

         /* kbd data takes priority over aux data.  */
         if (s->pending == KBD_PENDING_AUX) {
             s->status |= KBD_STAT_MOUSE_OBF;
         /* kbd data takes priority over aux data.  */
         if (s->pending == KBD_PENDING_AUX) {
             s->status |= KBD_STAT_MOUSE_OBF;

+            s->outport |= KBD_OUT_MOUSE_OBF;

             if (s->mode & KBD_MODE_MOUSE_INT)
                 irq_mouse_level = 1;
         } else {
             if (s->mode & KBD_MODE_MOUSE_INT)
                 irq_mouse_level = 1;
         } else {


@@ -175,14 +194,13 @@ static void kbd_update_aux_irq(void *opaque, int level)
     kbd_update_irq(s);
 }
 
     kbd_update_irq(s);
 }
 

-static uint32_t kbd_read_status(void *opaque, uint32_t addr)
+static uint64_t kbd_read_status(void *opaque, hwaddr addr,
+                                unsigned size)

 {
     KBDState *s = opaque;
     int val;
     val = s->status;
 {
     KBDState *s = opaque;
     int val;
     val = s->status;

-#if defined(DEBUG_KBD)
-    printf("kbd: read status=0x%02x\n", val);
-#endif
+    DPRINTF("kbd: read status=0x%02x\n", val);

     return val;
 }
 
     return val;
 }
 


@@ -194,13 +212,39 @@ static void kbd_queue(KBDState *s, int b, int aux)
         ps2_queue(s->kbd, b);
 }
 
         ps2_queue(s->kbd, b);
 }
 

-static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
+static void outport_write(KBDState *s, uint32_t val)
+{
+    DPRINTF("kbd: write outport=0x%02x\n", val);
+    s->outport = val;
+    if (s->a20_out) {
+        qemu_set_irq(*s->a20_out, (val >> 1) & 1);
+    }
+    if (!(val & 1)) {
+        qemu_system_reset_request();
+    }
+}
+
+static void kbd_write_command(void *opaque, hwaddr addr,
+                              uint64_t val, unsigned size)

 {
     KBDState *s = opaque;
 
 {
     KBDState *s = opaque;
 

-#ifdef DEBUG_KBD
-    printf("kbd: write cmd=0x%02x\n", val);
-#endif
+    DPRINTF("kbd: write cmd=0x%02x\n", val);
+
+    /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
+     * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
+     * command specify the output port bits to be pulsed.
+     * 0: Bit should be pulsed. 1: Bit should not be modified.
+     * The only useful version of this command is pulsing bit 0,
+     * which does a CPU reset.
+     */
+    if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
+        if(!(val & 1))
+            val = KBD_CCMD_RESET;
+        else
+            val = KBD_CCMD_NO_OP;
+    }
+

     switch(val) {
     case KBD_CCMD_READ_MODE:
         kbd_queue(s, s->mode, 0);
     switch(val) {
     case KBD_CCMD_READ_MODE:
         kbd_queue(s, s->mode, 0);


@@ -240,39 +284,34 @@ static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
         kbd_queue(s, 0x00, 0);
         break;
     case KBD_CCMD_READ_OUTPORT:
         kbd_queue(s, 0x00, 0);
         break;
     case KBD_CCMD_READ_OUTPORT:

-        /* XXX: check that */
-#ifdef TARGET_I386
-        val = 0x01 | (ioport_get_a20() << 1);
-#else
-        val = 0x01;
-#endif
-        if (s->status & KBD_STAT_OBF)
-            val |= 0x10;
-        if (s->status & KBD_STAT_MOUSE_OBF)
-            val |= 0x20;
-        kbd_queue(s, val, 0);
+        kbd_queue(s, s->outport, 0);

         break;
         break;

-#ifdef TARGET_I386

     case KBD_CCMD_ENABLE_A20:
     case KBD_CCMD_ENABLE_A20:

-        ioport_set_a20(1);
+        if (s->a20_out) {
+            qemu_irq_raise(*s->a20_out);
+        }
+        s->outport |= KBD_OUT_A20;

         break;
     case KBD_CCMD_DISABLE_A20:
         break;
     case KBD_CCMD_DISABLE_A20:

-        ioport_set_a20(0);
+        if (s->a20_out) {
+            qemu_irq_lower(*s->a20_out);
+        }
+        s->outport &= ~KBD_OUT_A20;

         break;
         break;

-#endif

     case KBD_CCMD_RESET:
         qemu_system_reset_request();
         break;
     case KBD_CCMD_RESET:
         qemu_system_reset_request();
         break;

-    case 0xff:
-        /* ignore that - I don't know what is its use */
+    case KBD_CCMD_NO_OP:
+        /* ignore that */

         break;
     default:
         break;
     default:

-        fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
+        fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", (int)val);

         break;
     }
 }
 
         break;
     }
 }
 

-static uint32_t kbd_read_data(void *opaque, uint32_t addr)
+static uint64_t kbd_read_data(void *opaque, hwaddr addr,
+                              unsigned size)

 {
     KBDState *s = opaque;
     uint32_t val;
 {
     KBDState *s = opaque;
     uint32_t val;


@@ -282,19 +321,16 @@ static uint32_t kbd_read_data(void *opaque, uint32_t addr)
     else
         val = ps2_read_data(s->kbd);
 
     else
         val = ps2_read_data(s->kbd);
 

-#if defined(DEBUG_KBD)
-    printf("kbd: read data=0x%02x\n", val);
-#endif
+    DPRINTF("kbd: read data=0x%02x\n", val);

     return val;
 }
 
     return val;
 }
 

-static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
+static void kbd_write_data(void *opaque, hwaddr addr,
+                           uint64_t val, unsigned size)

 {
     KBDState *s = opaque;
 
 {
     KBDState *s = opaque;
 

-#ifdef DEBUG_KBD
-    printf("kbd: write data=0x%02x\n", val);
-#endif
+    DPRINTF("kbd: write data=0x%02x\n", val);

 
     switch(s->write_cmd) {
     case 0:
 
     switch(s->write_cmd) {
     case 0:


@@ -313,12 +349,7 @@ static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
         kbd_queue(s, val, 1);
         break;
     case KBD_CCMD_WRITE_OUTPORT:
         kbd_queue(s, val, 1);
         break;
     case KBD_CCMD_WRITE_OUTPORT:

-#ifdef TARGET_I386
-        ioport_set_a20((val >> 1) & 1);
-#endif
-        if (!(val & 1)) {
-            qemu_system_reset_request();
-        }
+        outport_write(s, val);

         break;
     case KBD_CCMD_WRITE_MOUSE:
         ps2_write_mouse(s->mouse, val);
         break;
     case KBD_CCMD_WRITE_MOUSE:
         ps2_write_mouse(s->mouse, val);


@@ -335,6 +366,7 @@ static void kbd_reset(void *opaque)
 
     s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
     s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
 
     s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
     s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;

+    s->outport = KBD_OUT_RESET | KBD_OUT_A20;

 }
 
 static const VMStateDescription vmstate_kbd = {
 }
 
 static const VMStateDescription vmstate_kbd = {


@@ -352,66 +384,74 @@ static const VMStateDescription vmstate_kbd = {
 };
 
 /* Memory mapped interface */
 };
 
 /* Memory mapped interface */

-static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
+static uint32_t kbd_mm_readb (void *opaque, hwaddr addr)

 {
     KBDState *s = opaque;
 
     if (addr & s->mask)
 {
     KBDState *s = opaque;
 
     if (addr & s->mask)

-        return kbd_read_status(s, 0) & 0xff;
+        return kbd_read_status(s, 0, 1) & 0xff;

     else
     else

-        return kbd_read_data(s, 0) & 0xff;
+        return kbd_read_data(s, 0, 1) & 0xff;

 }
 
 }
 

-static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void kbd_mm_writeb (void *opaque, hwaddr addr, uint32_t value)

 {
     KBDState *s = opaque;
 
     if (addr & s->mask)
 {
     KBDState *s = opaque;
 
     if (addr & s->mask)

-        kbd_write_command(s, 0, value & 0xff);
+        kbd_write_command(s, 0, value & 0xff, 1);

     else
     else

-        kbd_write_data(s, 0, value & 0xff);
+        kbd_write_data(s, 0, value & 0xff, 1);

 }
 
 }
 

-static CPUReadMemoryFunc * const kbd_mm_read[] = {
-    &kbd_mm_readb,
-    &kbd_mm_readb,
-    &kbd_mm_readb,
-};
-
-static CPUWriteMemoryFunc * const kbd_mm_write[] = {
-    &kbd_mm_writeb,
-    &kbd_mm_writeb,
-    &kbd_mm_writeb,
+static const MemoryRegionOps i8042_mmio_ops = {
+    .endianness = DEVICE_NATIVE_ENDIAN,
+    .old_mmio = {
+        .read = { kbd_mm_readb, kbd_mm_readb, kbd_mm_readb },
+        .write = { kbd_mm_writeb, kbd_mm_writeb, kbd_mm_writeb },
+    },

 };
 
 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 };
 
 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,

-                   target_phys_addr_t base, ram_addr_t size,
-                   target_phys_addr_t mask)
+                   MemoryRegion *region, ram_addr_t size,
+                   hwaddr mask)

 {
 {

-    KBDState *s = qemu_mallocz(sizeof(KBDState));
-    int s_io_memory;
+    KBDState *s = g_malloc0(sizeof(KBDState));

 
     s->irq_kbd = kbd_irq;
     s->irq_mouse = mouse_irq;
     s->mask = mask;
 
 
     s->irq_kbd = kbd_irq;
     s->irq_mouse = mouse_irq;
     s->mask = mask;
 

-    vmstate_register(0, &vmstate_kbd, s);
-    s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
-    cpu_register_physical_memory(base, size, s_io_memory);
+    vmstate_register(NULL, 0, &vmstate_kbd, s);
+
+    memory_region_init_io(region, &i8042_mmio_ops, s, "i8042", size);

 
     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 
     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);

-#ifdef TARGET_I386
-    vmmouse_init(s->mouse);
-#endif

     qemu_register_reset(kbd_reset, s);
 }
 
 typedef struct ISAKBDState {
     ISADevice dev;
     qemu_register_reset(kbd_reset, s);
 }
 
 typedef struct ISAKBDState {
     ISADevice dev;

-    KBDState  kbd;
+    KBDState kbd;
+    MemoryRegion io[2];

 } ISAKBDState;
 
 } ISAKBDState;
 

+void i8042_isa_mouse_fake_event(void *opaque)
+{
+    ISADevice *dev = opaque;
+    KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
+
+    ps2_mouse_fake_event(s->mouse);
+}
+
+void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out)
+{
+    KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
+
+    s->a20_out = a20_out;
+}
+

 static const VMStateDescription vmstate_kbd_isa = {
     .name = "pckbd",
     .version_id = 3,
 static const VMStateDescription vmstate_kbd_isa = {
     .name = "pckbd",
     .version_id = 3,


@@ -423,37 +463,65 @@ static const VMStateDescription vmstate_kbd_isa = {
     }
 };
 
     }
 };
 

+static const MemoryRegionOps i8042_data_ops = {
+    .read = kbd_read_data,
+    .write = kbd_write_data,
+    .impl = {
+        .min_access_size = 1,
+        .max_access_size = 1,
+    },
+    .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static const MemoryRegionOps i8042_cmd_ops = {
+    .read = kbd_read_status,
+    .write = kbd_write_command,
+    .impl = {
+        .min_access_size = 1,
+        .max_access_size = 1,
+    },
+    .endianness = DEVICE_LITTLE_ENDIAN,
+};
+

 static int i8042_initfn(ISADevice *dev)
 {
 static int i8042_initfn(ISADevice *dev)
 {

-    KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
+    ISAKBDState *isa_s = DO_UPCAST(ISAKBDState, dev, dev);
+    KBDState *s = &isa_s->kbd;

 
     isa_init_irq(dev, &s->irq_kbd, 1);
     isa_init_irq(dev, &s->irq_mouse, 12);
 
 
     isa_init_irq(dev, &s->irq_kbd, 1);
     isa_init_irq(dev, &s->irq_mouse, 12);
 

-    register_ioport_read(0x60, 1, 1, kbd_read_data, s);
-    register_ioport_write(0x60, 1, 1, kbd_write_data, s);
-    register_ioport_read(0x64, 1, 1, kbd_read_status, s);
-    register_ioport_write(0x64, 1, 1, kbd_write_command, s);
+    memory_region_init_io(isa_s->io + 0, &i8042_data_ops, s, "i8042-data", 1);
+    isa_register_ioport(dev, isa_s->io + 0, 0x60);
+
+    memory_region_init_io(isa_s->io + 1, &i8042_cmd_ops, s, "i8042-cmd", 1);
+    isa_register_ioport(dev, isa_s->io + 1, 0x64);

 
     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 
     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);

-#ifdef TARGET_I386
-    vmmouse_init(s->mouse);
-#endif

     qemu_register_reset(kbd_reset, s);
     return 0;
 }
 
     qemu_register_reset(kbd_reset, s);
     return 0;
 }
 

-static ISADeviceInfo i8042_info = {
-    .qdev.name     = "i8042",
-    .qdev.size     = sizeof(ISAKBDState),
-    .qdev.vmsd     = &vmstate_kbd_isa,
-    .qdev.no_user  = 1,
-    .init          = i8042_initfn,
+static void i8042_class_initfn(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+    ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
+    ic->init = i8042_initfn;
+    dc->no_user = 1;
+    dc->vmsd = &vmstate_kbd_isa;
+}
+
+static TypeInfo i8042_info = {
+    .name          = "i8042",
+    .parent        = TYPE_ISA_DEVICE,
+    .instance_size = sizeof(ISAKBDState),
+    .class_init    = i8042_class_initfn,

 };
 
 };
 

-static void i8042_register(void)
+static void i8042_register_types(void)

 {
 {

-    isa_qdev_register(&i8042_info);
+    type_register_static(&i8042_info);

 }
 }

-device_init(i8042_register)
+
+type_init(i8042_register_types)