QPCIDevice *dev;
QPCIBar tco_io_bar;
QPCIBus *bus;
+ QTestState *qts;
} TestData;
static void test_end(TestData *d)
{
g_free(d->dev);
qpci_free_pc(d->bus);
- qtest_end();
+ qtest_quit(d->qts);
}
static void test_init(TestData *d)
qs = qtest_initf("-machine q35 %s %s",
d->noreboot ? "" : "-global ICH9-LPC.noreboot=false",
!d->args ? "" : d->args);
- global_qtest = qs;
qtest_irq_intercept_in(qs, "ioapic");
d->bus = qpci_new_pc(qs, NULL);
qpci_config_writel(d->dev, ICH9_LPC_RCBA, RCBA_BASE_ADDR | 0x1);
d->tco_io_bar = qpci_legacy_iomap(d->dev, PM_IO_BASE_ADDR + 0x60);
+ d->qts = qs;
}
static void stop_tco(const TestData *d)
qpci_io_writew(d->dev, d->tco_io_bar, TCO2_STS, 0x0004);
}
-static void reset_on_second_timeout(bool enable)
+static void reset_on_second_timeout(const TestData *td, bool enable)
{
uint32_t val;
- val = readl(RCBA_BASE_ADDR + ICH9_CC_GCS);
+ val = qtest_readl(td->qts, RCBA_BASE_ADDR + ICH9_CC_GCS);
if (enable) {
val &= ~ICH9_CC_GCS_NO_REBOOT;
} else {
val |= ICH9_CC_GCS_NO_REBOOT;
}
- writel(RCBA_BASE_ADDR + ICH9_CC_GCS, val);
+ qtest_writel(td->qts, RCBA_BASE_ADDR + ICH9_CC_GCS, val);
}
static void test_tco_defaults(void)
stop_tco(&d);
clear_tco_status(&d);
- reset_on_second_timeout(false);
+ reset_on_second_timeout(&d, false);
set_tco_timeout(&d, ticks);
load_tco(&d);
start_tco(&d);
- clock_step(ticks * TCO_TICK_NSEC);
+ qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC);
/* test first timeout */
val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS);
g_assert(ret == 0);
/* test second timeout */
- clock_step(ticks * TCO_TICK_NSEC);
+ qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC);
val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS);
ret = val & TCO_TIMEOUT ? 1 : 0;
g_assert(ret == 1);
stop_tco(&d);
clear_tco_status(&d);
- reset_on_second_timeout(false);
+ reset_on_second_timeout(&d, false);
set_tco_timeout(&d, ticks);
load_tco(&d);
start_tco(&d);
- clock_step(((ticks & TCO_TMR_MASK) - 1) * TCO_TICK_NSEC);
+ qtest_clock_step(d.qts, ((ticks & TCO_TMR_MASK) - 1) * TCO_TICK_NSEC);
val = qpci_io_readw(d.dev, d.tco_io_bar, TCO_RLD);
g_assert_cmpint(val & TCO_RLD_MASK, ==, 1);
val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS);
ret = val & TCO_TIMEOUT ? 1 : 0;
g_assert(ret == 0);
- clock_step(TCO_TICK_NSEC);
+ qtest_clock_step(d.qts, TCO_TICK_NSEC);
val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS);
ret = val & TCO_TIMEOUT ? 1 : 0;
g_assert(ret == 1);
test_end(&d);
}
-static QDict *get_watchdog_action(void)
+static QDict *get_watchdog_action(const TestData *td)
{
- QDict *ev = qmp_eventwait_ref("WATCHDOG");
+ QDict *ev = qtest_qmp_eventwait_ref(td->qts, "WATCHDOG");
QDict *data;
data = qdict_get_qdict(ev, "data");
stop_tco(&td);
clear_tco_status(&td);
- reset_on_second_timeout(true);
+ reset_on_second_timeout(&td, true);
set_tco_timeout(&td, TCO_SECS_TO_TICKS(16));
load_tco(&td);
start_tco(&td);
- clock_step(ticks * TCO_TICK_NSEC * 2);
- ad = get_watchdog_action();
+ qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2);
+ ad = get_watchdog_action(&td);
g_assert(!strcmp(qdict_get_str(ad, "action"), "pause"));
qobject_unref(ad);
stop_tco(&td);
clear_tco_status(&td);
- reset_on_second_timeout(true);
+ reset_on_second_timeout(&td, true);
set_tco_timeout(&td, TCO_SECS_TO_TICKS(16));
load_tco(&td);
start_tco(&td);
- clock_step(ticks * TCO_TICK_NSEC * 2);
- ad = get_watchdog_action();
+ qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2);
+ ad = get_watchdog_action(&td);
g_assert(!strcmp(qdict_get_str(ad, "action"), "reset"));
qobject_unref(ad);
stop_tco(&td);
clear_tco_status(&td);
- reset_on_second_timeout(true);
+ reset_on_second_timeout(&td, true);
set_tco_timeout(&td, ticks);
load_tco(&td);
start_tco(&td);
- clock_step(ticks * TCO_TICK_NSEC * 2);
- ad = get_watchdog_action();
+ qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2);
+ ad = get_watchdog_action(&td);
g_assert(!strcmp(qdict_get_str(ad, "action"), "shutdown"));
qobject_unref(ad);
stop_tco(&td);
clear_tco_status(&td);
- reset_on_second_timeout(true);
+ reset_on_second_timeout(&td, true);
set_tco_timeout(&td, ticks);
load_tco(&td);
start_tco(&td);
- clock_step(ticks * TCO_TICK_NSEC * 2);
- ad = get_watchdog_action();
+ qtest_clock_step(td.qts, ticks * TCO_TICK_NSEC * 2);
+ ad = get_watchdog_action(&td);
g_assert(!strcmp(qdict_get_str(ad, "action"), "none"));
qobject_unref(ad);
stop_tco(&d);
clear_tco_status(&d);
- reset_on_second_timeout(false);
+ reset_on_second_timeout(&d, false);
set_tco_timeout(&d, ticks);
load_tco(&d);
start_tco(&d);
do {
rld = qpci_io_readw(d.dev, d.tco_io_bar, TCO_RLD) & TCO_RLD_MASK;
g_assert_cmpint(rld, ==, ticks);
- clock_step(TCO_TICK_NSEC);
+ qtest_clock_step(d.qts, TCO_TICK_NSEC);
ticks--;
} while (!(qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS) & TCO_TIMEOUT));
stop_tco(&d);
clear_tco_status(&d);
- reset_on_second_timeout(false);
+ reset_on_second_timeout(&d, false);
set_tco_timeout(&d, ticks);
load_tco(&d);
start_tco(&d);
- clock_step(ticks * TCO_TICK_NSEC);
+ qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC);
qpci_io_writeb(d.dev, d.tco_io_bar, TCO_DAT_IN, 0);
qpci_io_writeb(d.dev, d.tco_io_bar, TCO_DAT_OUT, 0);
stop_tco(&d);
clear_tco_status(&d);
- reset_on_second_timeout(true);
+ reset_on_second_timeout(&d, true);
set_tco_timeout(&d, ticks);
load_tco(&d);
start_tco(&d);
- clock_step(ticks * TCO_TICK_NSEC * 2);
+ qtest_clock_step(d.qts, ticks * TCO_TICK_NSEC * 2);
val = qpci_io_readw(d.dev, d.tco_io_bar, TCO2_STS);
ret = val & (TCO_SECOND_TO_STS | TCO_BOOT_STS) ? 1 : 0;