* -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
*
* Where msr.flat is one of the KVM unittests, present on a separate repo,
- * git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
+ * https://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
*/
-#include "config-host.h"
-#if defined(CONFIG_POSIX)
-#include <sys/mman.h>
-#endif
-#include "hw/hw.h"
-#include "hw/qdev.h"
+#include "qemu/osdep.h"
+#include "qemu/module.h"
+#include "hw/irq.h"
#include "hw/isa/isa.h"
#define IOMEM_LEN 0x10000
ISADevice parent_obj;
MemoryRegion ioport;
+ MemoryRegion ioport_byte;
MemoryRegion flush;
MemoryRegion irq;
MemoryRegion iomem;
#define TESTDEV(obj) \
OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
-static void test_irq_line(void *opaque, hwaddr addr, uint64_t data,
+static uint64_t test_irq_line_read(void *opaque, hwaddr addr, unsigned size)
+{
+ return 0;
+}
+
+static void test_irq_line_write(void *opaque, hwaddr addr, uint64_t data,
unsigned len)
{
PCTestdev *dev = opaque;
}
static const MemoryRegionOps test_irq_ops = {
- .write = test_irq_line,
+ .read = test_irq_line_read,
+ .write = test_irq_line_write,
.valid.min_access_size = 1,
.valid.max_access_size = 1,
.endianness = DEVICE_LITTLE_ENDIAN,
unsigned len)
{
PCTestdev *dev = opaque;
- dev->ioport_data = data;
+ int bits = len * 8;
+ int start_bit = (addr & 3) * 8;
+ uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
+ dev->ioport_data &= ~mask;
+ dev->ioport_data |= data << start_bit;
}
static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
{
PCTestdev *dev = opaque;
- return dev->ioport_data;
+ int bits = len * 8;
+ int start_bit = (addr & 3) * 8;
+ uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
+ return (dev->ioport_data & mask) >> start_bit;
}
static const MemoryRegionOps test_ioport_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static void test_flush_page(void *opaque, hwaddr addr, uint64_t data,
+static const MemoryRegionOps test_ioport_byte_ops = {
+ .read = test_ioport_read,
+ .write = test_ioport_write,
+ .valid.min_access_size = 1,
+ .valid.max_access_size = 4,
+ .impl.min_access_size = 1,
+ .impl.max_access_size = 1,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static uint64_t test_flush_page_read(void *opaque, hwaddr addr, unsigned size)
+{
+ return 0;
+}
+
+static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data,
unsigned len)
{
hwaddr page = 4096;
- void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
+ void *a = cpu_physical_memory_map(data & ~0xffful, &page, false);
/* We might not be able to get the full page, only mprotect what we actually
have mapped */
}
static const MemoryRegionOps test_flush_ops = {
- .write = test_flush_page,
+ .read = test_flush_page_read,
+ .write = test_flush_page_write,
.valid.min_access_size = 4,
.valid.max_access_size = 4,
.endianness = DEVICE_LITTLE_ENDIAN,
PCTestdev *dev = opaque;
uint64_t ret = 0;
memcpy(&ret, &dev->iomem_buf[addr], len);
- ret = le64_to_cpu(ret);
return ret;
}
unsigned len)
{
PCTestdev *dev = opaque;
- val = cpu_to_le64(val);
memcpy(&dev->iomem_buf[addr], &val, len);
dev->iomem_buf[addr] = val;
}
memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
"pc-testdev-ioport", 4);
+ memory_region_init_io(&dev->ioport_byte, OBJECT(dev),
+ &test_ioport_byte_ops, dev,
+ "pc-testdev-ioport-byte", 4);
memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
"pc-testdev-flush-page", 4);
memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
memory_region_add_subregion(io, 0xe0, &dev->ioport);
memory_region_add_subregion(io, 0xe4, &dev->flush);
+ memory_region_add_subregion(io, 0xe8, &dev->ioport_byte);
memory_region_add_subregion(io, 0x2000, &dev->irq);
memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
}
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->realize = testdev_realizefn;
}