omap_lcdc: omap_ppm_save(): add error handling

[qemu.git] / hw / omap_l4.c

diff --git a/hw/omap_l4.c b/hw/omap_l4.c
index a4a8883d2a8f75054be9c2653054ec746b672b20..dbad7f67a8f38abc5d76c07f57cd8cfea549ec88 100644 (file)
--- a/hw/omap_l4.c
+++ b/hw/omap_l4.c
@@ -20,129 +20,23 @@
 #include "hw.h"
 #include "omap.h"
 
 #include "hw.h"
 #include "omap.h"
 

-#ifdef L4_MUX_HACK
-static int omap_l4_io_entries;
-static int omap_cpu_io_entry;
-static struct omap_l4_entry {
-        CPUReadMemoryFunc * const *mem_read;
-        CPUWriteMemoryFunc * const *mem_write;
-        void *opaque;
-} *omap_l4_io_entry;
-static CPUReadMemoryFunc * const *omap_l4_io_readb_fn;
-static CPUReadMemoryFunc * const *omap_l4_io_readh_fn;
-static CPUReadMemoryFunc * const *omap_l4_io_readw_fn;
-static CPUWriteMemoryFunc * const *omap_l4_io_writeb_fn;
-static CPUWriteMemoryFunc * const *omap_l4_io_writeh_fn;
-static CPUWriteMemoryFunc * const *omap_l4_io_writew_fn;
-static void **omap_l4_io_opaque;
-
-int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
-                CPUWriteMemoryFunc * const *mem_write, void *opaque)
-{
-    omap_l4_io_entry[omap_l4_io_entries].mem_read = mem_read;
-    omap_l4_io_entry[omap_l4_io_entries].mem_write = mem_write;
-    omap_l4_io_entry[omap_l4_io_entries].opaque = opaque;
-
-    return omap_l4_io_entries ++;
-}
-
-static uint32_t omap_l4_io_readb(void *opaque, target_phys_addr_t addr)
-{
-    unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS;
-
-    return omap_l4_io_readb_fn[i](omap_l4_io_opaque[i], addr);
-}
-
-static uint32_t omap_l4_io_readh(void *opaque, target_phys_addr_t addr)
-{
-    unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS;
-
-    return omap_l4_io_readh_fn[i](omap_l4_io_opaque[i], addr);
-}
-
-static uint32_t omap_l4_io_readw(void *opaque, target_phys_addr_t addr)
-{
-    unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS;
-
-    return omap_l4_io_readw_fn[i](omap_l4_io_opaque[i], addr);
-}
-
-static void omap_l4_io_writeb(void *opaque, target_phys_addr_t addr,
-                uint32_t value)
-{
-    unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS;
-
-    return omap_l4_io_writeb_fn[i](omap_l4_io_opaque[i], addr, value);
-}
-
-static void omap_l4_io_writeh(void *opaque, target_phys_addr_t addr,
-                uint32_t value)
-{
-    unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS;
-
-    return omap_l4_io_writeh_fn[i](omap_l4_io_opaque[i], addr, value);
-}
-
-static void omap_l4_io_writew(void *opaque, target_phys_addr_t addr,
-                uint32_t value)
-{
-    unsigned int i = (addr - OMAP2_L4_BASE) >> TARGET_PAGE_BITS;
-
-    return omap_l4_io_writew_fn[i](omap_l4_io_opaque[i], addr, value);
-}
-
-static CPUReadMemoryFunc * const omap_l4_io_readfn[] = {
-    omap_l4_io_readb,
-    omap_l4_io_readh,
-    omap_l4_io_readw,
-};
-
-static CPUWriteMemoryFunc * const omap_l4_io_writefn[] = {
-    omap_l4_io_writeb,
-    omap_l4_io_writeh,
-    omap_l4_io_writew,
-};
-#else
-int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
-                          CPUWriteMemoryFunc * const *mem_write,
-                          void *opaque)
-{
-    return cpu_register_io_memory(mem_read, mem_write, opaque,
-                                  DEVICE_NATIVE_ENDIAN);
-}
-#endif
-

 struct omap_l4_s {
 struct omap_l4_s {

+    MemoryRegion *address_space;

     target_phys_addr_t base;
     int ta_num;
     struct omap_target_agent_s ta[0];
 };
 
     target_phys_addr_t base;
     int ta_num;
     struct omap_target_agent_s ta[0];
 };
 

-struct omap_l4_s *omap_l4_init(target_phys_addr_t base, int ta_num)
+struct omap_l4_s *omap_l4_init(MemoryRegion *address_space,
+                               target_phys_addr_t base, int ta_num)

 {
     struct omap_l4_s *bus = g_malloc0(
                     sizeof(*bus) + ta_num * sizeof(*bus->ta));
 
 {
     struct omap_l4_s *bus = g_malloc0(
                     sizeof(*bus) + ta_num * sizeof(*bus->ta));
 

+    bus->address_space = address_space;

     bus->ta_num = ta_num;
     bus->base = base;
 
     bus->ta_num = ta_num;
     bus->base = base;
 

-#ifdef L4_MUX_HACK
-    omap_l4_io_entries = 1;
-    omap_l4_io_entry = g_malloc0(125 * sizeof(*omap_l4_io_entry));
-
-    omap_cpu_io_entry =
-            cpu_register_io_memory(omap_l4_io_readfn,
-                            omap_l4_io_writefn, bus, DEVICE_NATIVE_ENDIAN);
-# define L4_PAGES      (0xb4000 / TARGET_PAGE_SIZE)
-    omap_l4_io_readb_fn = g_malloc0(sizeof(void *) * L4_PAGES);
-    omap_l4_io_readh_fn = g_malloc0(sizeof(void *) * L4_PAGES);
-    omap_l4_io_readw_fn = g_malloc0(sizeof(void *) * L4_PAGES);
-    omap_l4_io_writeb_fn = g_malloc0(sizeof(void *) * L4_PAGES);
-    omap_l4_io_writeh_fn = g_malloc0(sizeof(void *) * L4_PAGES);
-    omap_l4_io_writew_fn = g_malloc0(sizeof(void *) * L4_PAGES);
-    omap_l4_io_opaque = g_malloc0(sizeof(void *) * L4_PAGES);
-#endif
-

     return bus;
 }
 
     return bus;
 }
 


@@ -152,10 +46,21 @@ target_phys_addr_t omap_l4_region_base(struct omap_target_agent_s *ta,
     return ta->bus->base + ta->start[region].offset;
 }
 
     return ta->bus->base + ta->start[region].offset;
 }
 

-static uint32_t omap_l4ta_read(void *opaque, target_phys_addr_t addr)
+target_phys_addr_t omap_l4_region_size(struct omap_target_agent_s *ta,
+                                       int region)
+{
+    return ta->start[region].size;
+}
+
+static uint64_t omap_l4ta_read(void *opaque, target_phys_addr_t addr,
+                               unsigned size)

 {
     struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
 
 {
     struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
 

+    if (size != 2) {
+        return omap_badwidth_read16(opaque, addr);
+    }
+

     switch (addr) {
     case 0x00: /* COMPONENT */
         return s->component;
     switch (addr) {
     case 0x00: /* COMPONENT */
         return s->component;


@@ -172,10 +77,14 @@ static uint32_t omap_l4ta_read(void *opaque, target_phys_addr_t addr)
 }
 
 static void omap_l4ta_write(void *opaque, target_phys_addr_t addr,
 }
 
 static void omap_l4ta_write(void *opaque, target_phys_addr_t addr,

-                uint32_t value)
+                            uint64_t value, unsigned size)

 {
     struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
 
 {
     struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
 

+    if (size != 4) {
+        return omap_badwidth_write32(opaque, addr, value);
+    }
+

     switch (addr) {
     case 0x00: /* COMPONENT */
     case 0x28: /* AGENT_STATUS */
     switch (addr) {
     case 0x00: /* COMPONENT */
     case 0x28: /* AGENT_STATUS */


@@ -193,16 +102,10 @@ static void omap_l4ta_write(void *opaque, target_phys_addr_t addr,
     }
 }
 
     }
 }
 

-static CPUReadMemoryFunc * const omap_l4ta_readfn[] = {
-    omap_badwidth_read16,
-    omap_l4ta_read,
-    omap_badwidth_read16,
-};
-
-static CPUWriteMemoryFunc * const omap_l4ta_writefn[] = {
-    omap_badwidth_write32,
-    omap_badwidth_write32,
-    omap_l4ta_write,
+static const MemoryRegionOps omap_l4ta_ops = {
+    .read = omap_l4ta_read,
+    .write = omap_l4ta_write,
+    .endianness = DEVICE_NATIVE_ENDIAN,

 };
 
 struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
 };
 
 struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,


@@ -210,7 +113,7 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
        const struct omap_l4_agent_info_s *agents,
        int cs)
 {
        const struct omap_l4_agent_info_s *agents,
        int cs)
 {

-    int i, iomemtype;
+    int i;

     struct omap_target_agent_s *ta = NULL;
     const struct omap_l4_agent_info_s *info = NULL;
 
     struct omap_target_agent_s *ta = NULL;
     const struct omap_l4_agent_info_s *info = NULL;
 


@@ -233,21 +136,17 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
     ta->status = 0x00000000;
     ta->control = 0x00000200;  /* XXX 01000200 for L4TAO */
 
     ta->status = 0x00000000;
     ta->control = 0x00000200;  /* XXX 01000200 for L4TAO */
 

-    iomemtype = l4_register_io_memory(omap_l4ta_readfn,
-                    omap_l4ta_writefn, ta);
-    ta->base = omap_l4_attach(ta, info->ta_region, iomemtype);
+    memory_region_init_io(&ta->iomem, &omap_l4ta_ops, ta, "omap.l4ta",
+                          omap_l4_region_size(ta, info->ta_region));
+    omap_l4_attach(ta, info->ta_region, &ta->iomem);

 
     return ta;
 }
 
 
     return ta;
 }
 

-target_phys_addr_t omap_l4_attach(struct omap_target_agent_s *ta, int region,
-                int iotype)
+target_phys_addr_t omap_l4_attach(struct omap_target_agent_s *ta,
+                                         int region, MemoryRegion *mr)

 {
     target_phys_addr_t base;
 {
     target_phys_addr_t base;

-    ssize_t size;
-#ifdef L4_MUX_HACK
-    int i;
-#endif

 
     if (region < 0 || region >= ta->regions) {
         fprintf(stderr, "%s: bad io region (%i)\n", __FUNCTION__, region);
 
     if (region < 0 || region >= ta->regions) {
         fprintf(stderr, "%s: bad io region (%i)\n", __FUNCTION__, region);


@@ -255,23 +154,8 @@ target_phys_addr_t omap_l4_attach(struct omap_target_agent_s *ta, int region,
     }
 
     base = ta->bus->base + ta->start[region].offset;
     }
 
     base = ta->bus->base + ta->start[region].offset;

-    size = ta->start[region].size;
-    if (iotype) {
-#ifndef L4_MUX_HACK
-        cpu_register_physical_memory(base, size, iotype);
-#else
-        cpu_register_physical_memory(base, size, omap_cpu_io_entry);
-        i = (base - ta->bus->base) / TARGET_PAGE_SIZE;
-        for (; size > 0; size -= TARGET_PAGE_SIZE, i ++) {
-            omap_l4_io_readb_fn[i] = omap_l4_io_entry[iotype].mem_read[0];
-            omap_l4_io_readh_fn[i] = omap_l4_io_entry[iotype].mem_read[1];
-            omap_l4_io_readw_fn[i] = omap_l4_io_entry[iotype].mem_read[2];
-            omap_l4_io_writeb_fn[i] = omap_l4_io_entry[iotype].mem_write[0];
-            omap_l4_io_writeh_fn[i] = omap_l4_io_entry[iotype].mem_write[1];
-            omap_l4_io_writew_fn[i] = omap_l4_io_entry[iotype].mem_write[2];
-            omap_l4_io_opaque[i] = omap_l4_io_entry[iotype].opaque;
-        }
-#endif
+    if (mr) {
+        memory_region_add_subregion(ta->bus->address_space, base, mr);

     }
 
     return base;
     }
 
     return base;