hw/exynos4210_pwm.c: Fix STOP status in tick handler.

[qemu.git] / hw / vga.c

diff --git a/hw/vga.c b/hw/vga.c
index a190105b1d3f311533a947bc02be74ed8c066651..acb3f7d924cd9c835f64d6eefdb46ff7951ff998 100644 (file)
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -22,13 +22,15 @@
  * THE SOFTWARE.
  */
 #include "hw.h"
  * THE SOFTWARE.
  */
 #include "hw.h"

+#include "vga.h"

 #include "console.h"
 #include "pc.h"
 #include "pci.h"
 #include "vga_int.h"
 #include "pixel_ops.h"
 #include "qemu-timer.h"
 #include "console.h"
 #include "pc.h"
 #include "pci.h"
 #include "vga_int.h"
 #include "pixel_ops.h"
 #include "qemu-timer.h"

-#include "exec-memory.h"
+#include "xen.h"
+#include "trace.h"

 
 //#define DEBUG_VGA
 //#define DEBUG_VGA_MEM
 
 //#define DEBUG_VGA
 //#define DEBUG_VGA_MEM


@@ -36,6 +38,18 @@
 
 //#define DEBUG_BOCHS_VBE
 
 
 //#define DEBUG_BOCHS_VBE
 

+/*
+ * Video Graphics Array (VGA)
+ *
+ * Chipset docs for original IBM VGA:
+ * http://www.mcamafia.de/pdf/ibm_vgaxga_trm2.pdf
+ *
+ * FreeVGA site:
+ * http://www.osdever.net/FreeVGA/home.htm
+ *
+ * Standard VGA features and Bochs VBE extensions are implemented.
+ */
+

 /* force some bits to zero */
 const uint8_t sr_mask[8] = {
     0x03,
 /* force some bits to zero */
 const uint8_t sr_mask[8] = {
     0x03,


@@ -149,9 +163,52 @@ static uint32_t expand4[256];
 static uint16_t expand2[256];
 static uint8_t expand4to8[16];
 
 static uint16_t expand2[256];
 static uint8_t expand4to8[16];
 

-static void vga_screen_dump(void *opaque, const char *filename);
-static char *screen_dump_filename;
-static DisplayChangeListener *screen_dump_dcl;
+static void vga_screen_dump(void *opaque, const char *filename, bool cswitch);
+
+static void vga_update_memory_access(VGACommonState *s)
+{
+    MemoryRegion *region, *old_region = s->chain4_alias;
+    target_phys_addr_t base, offset, size;
+
+    s->chain4_alias = NULL;
+
+    if ((s->sr[VGA_SEQ_PLANE_WRITE] & VGA_SR02_ALL_PLANES) ==
+        VGA_SR02_ALL_PLANES && s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
+        offset = 0;
+        switch ((s->gr[VGA_GFX_MISC] >> 2) & 3) {
+        case 0:
+            base = 0xa0000;
+            size = 0x20000;
+            break;
+        case 1:
+            base = 0xa0000;
+            size = 0x10000;
+            offset = s->bank_offset;
+            break;
+        case 2:
+            base = 0xb0000;
+            size = 0x8000;
+            break;
+        case 3:
+        default:
+            base = 0xb8000;
+            size = 0x8000;
+            break;
+        }
+        base += isa_mem_base;
+        region = g_malloc(sizeof(*region));
+        memory_region_init_alias(region, "vga.chain4", &s->vram, offset, size);
+        memory_region_add_subregion_overlap(s->legacy_address_space, base,
+                                            region, 2);
+        s->chain4_alias = region;
+    }
+    if (old_region) {
+        memory_region_del_subregion(s->legacy_address_space, old_region);
+        memory_region_destroy(old_region);
+        g_free(old_region);
+        s->plane_updated = 0xf;
+    }
+}

 
 static void vga_dumb_update_retrace_info(VGACommonState *s)
 {
 
 static void vga_dumb_update_retrace_info(VGACommonState *s)
 {


@@ -179,22 +236,20 @@ static void vga_precise_update_retrace_info(VGACommonState *s)
     int64_t chars_per_sec;
     struct vga_precise_retrace *r = &s->retrace_info.precise;
 
     int64_t chars_per_sec;
     struct vga_precise_retrace *r = &s->retrace_info.precise;
 

-    htotal_chars = s->cr[0x00] + 5;
-    hretr_start_char = s->cr[0x04];
-    hretr_skew_chars = (s->cr[0x05] >> 5) & 3;
-    hretr_end_char = s->cr[0x05] & 0x1f;
-
-    vtotal_lines = (s->cr[0x06]
-                    | (((s->cr[0x07] & 1) | ((s->cr[0x07] >> 4) & 2)) << 8)) + 2
-        ;
-    vretr_start_line = s->cr[0x10]
-        | ((((s->cr[0x07] >> 2) & 1) | ((s->cr[0x07] >> 6) & 2)) << 8)
-        ;
-    vretr_end_line = s->cr[0x11] & 0xf;
+    htotal_chars = s->cr[VGA_CRTC_H_TOTAL] + 5;
+    hretr_start_char = s->cr[VGA_CRTC_H_SYNC_START];
+    hretr_skew_chars = (s->cr[VGA_CRTC_H_SYNC_END] >> 5) & 3;
+    hretr_end_char = s->cr[VGA_CRTC_H_SYNC_END] & 0x1f;

 
 

+    vtotal_lines = (s->cr[VGA_CRTC_V_TOTAL] |
+                    (((s->cr[VGA_CRTC_OVERFLOW] & 1) |
+                      ((s->cr[VGA_CRTC_OVERFLOW] >> 4) & 2)) << 8)) + 2;
+    vretr_start_line = s->cr[VGA_CRTC_V_SYNC_START] |
+        ((((s->cr[VGA_CRTC_OVERFLOW] >> 2) & 1) |
+          ((s->cr[VGA_CRTC_OVERFLOW] >> 6) & 2)) << 8);
+    vretr_end_line = s->cr[VGA_CRTC_V_SYNC_END] & 0xf;

 
 

-
-    clocking_mode = (s->sr[0x01] >> 3) & 1;
+    clocking_mode = (s->sr[VGA_SEQ_CLOCK_MODE] >> 3) & 1;

     clock_sel = (s->msr >> 2) & 3;
     dots = (s->msr & 1) ? 8 : 9;
 
     clock_sel = (s->msr >> 2) & 3;
     dots = (s->msr & 1) ? 8 : 9;
 


@@ -217,8 +272,8 @@ static void vga_precise_update_retrace_info(VGACommonState *s)
     r->htotal = htotal_chars;
 
 #if 0
     r->htotal = htotal_chars;
 
 #if 0

-    div2 = (s->cr[0x17] >> 2) & 1;
-    sldiv2 = (s->cr[0x17] >> 3) & 1;
+    div2 = (s->cr[VGA_CRTC_MODE] >> 2) & 1;
+    sldiv2 = (s->cr[VGA_CRTC_MODE] >> 3) & 1;

     printf (
         "hz=%f\n"
         "htotal = %d\n"
     printf (
         "hz=%f\n"
         "htotal = %d\n"


@@ -288,7 +343,7 @@ static uint8_t vga_dumb_retrace(VGACommonState *s)
 
 int vga_ioport_invalid(VGACommonState *s, uint32_t addr)
 {
 
 int vga_ioport_invalid(VGACommonState *s, uint32_t addr)
 {

-    if (s->msr & MSR_COLOR_EMULATION) {
+    if (s->msr & VGA_MIS_COLOR) {

         /* Color */
         return (addr >= 0x3b0 && addr <= 0x3bf);
     } else {
         /* Color */
         return (addr >= 0x3b0 && addr <= 0x3bf);
     } else {


@@ -306,73 +361,74 @@ uint32_t vga_ioport_read(void *opaque, uint32_t addr)
         val = 0xff;
     } else {
         switch(addr) {
         val = 0xff;
     } else {
         switch(addr) {

-        case 0x3c0:
+        case VGA_ATT_W:

             if (s->ar_flip_flop == 0) {
                 val = s->ar_index;
             } else {
                 val = 0;
             }
             break;
             if (s->ar_flip_flop == 0) {
                 val = s->ar_index;
             } else {
                 val = 0;
             }
             break;

-        case 0x3c1:
+        case VGA_ATT_R:

             index = s->ar_index & 0x1f;
             index = s->ar_index & 0x1f;

-            if (index < 21)
+            if (index < VGA_ATT_C) {

                 val = s->ar[index];
                 val = s->ar[index];

-            else
+            } else {

                 val = 0;
                 val = 0;

+            }

             break;
             break;

-        case 0x3c2:
+        case VGA_MIS_W:

             val = s->st00;
             break;
             val = s->st00;
             break;

-        case 0x3c4:
+        case VGA_SEQ_I:

             val = s->sr_index;
             break;
             val = s->sr_index;
             break;

-        case 0x3c5:
+        case VGA_SEQ_D:

             val = s->sr[s->sr_index];
 #ifdef DEBUG_VGA_REG
             printf("vga: read SR%x = 0x%02x\n", s->sr_index, val);
 #endif
             break;
             val = s->sr[s->sr_index];
 #ifdef DEBUG_VGA_REG
             printf("vga: read SR%x = 0x%02x\n", s->sr_index, val);
 #endif
             break;

-        case 0x3c7:
+        case VGA_PEL_IR:

             val = s->dac_state;
             break;
             val = s->dac_state;
             break;

-        case 0x3c8:
+        case VGA_PEL_IW:

             val = s->dac_write_index;
             break;
             val = s->dac_write_index;
             break;

-        case 0x3c9:
+        case VGA_PEL_D:

             val = s->palette[s->dac_read_index * 3 + s->dac_sub_index];
             if (++s->dac_sub_index == 3) {
                 s->dac_sub_index = 0;
                 s->dac_read_index++;
             }
             break;
             val = s->palette[s->dac_read_index * 3 + s->dac_sub_index];
             if (++s->dac_sub_index == 3) {
                 s->dac_sub_index = 0;
                 s->dac_read_index++;
             }
             break;

-        case 0x3ca:
+        case VGA_FTC_R:

             val = s->fcr;
             break;
             val = s->fcr;
             break;

-        case 0x3cc:
+        case VGA_MIS_R:

             val = s->msr;
             break;
             val = s->msr;
             break;

-        case 0x3ce:
+        case VGA_GFX_I:

             val = s->gr_index;
             break;
             val = s->gr_index;
             break;

-        case 0x3cf:
+        case VGA_GFX_D:

             val = s->gr[s->gr_index];
 #ifdef DEBUG_VGA_REG
             printf("vga: read GR%x = 0x%02x\n", s->gr_index, val);
 #endif
             break;
             val = s->gr[s->gr_index];
 #ifdef DEBUG_VGA_REG
             printf("vga: read GR%x = 0x%02x\n", s->gr_index, val);
 #endif
             break;

-        case 0x3b4:
-        case 0x3d4:
+        case VGA_CRT_IM:
+        case VGA_CRT_IC:

             val = s->cr_index;
             break;
             val = s->cr_index;
             break;

-        case 0x3b5:
-        case 0x3d5:
+        case VGA_CRT_DM:
+        case VGA_CRT_DC:

             val = s->cr[s->cr_index];
 #ifdef DEBUG_VGA_REG
             printf("vga: read CR%x = 0x%02x\n", s->cr_index, val);
 #endif
             break;
             val = s->cr[s->cr_index];
 #ifdef DEBUG_VGA_REG
             printf("vga: read CR%x = 0x%02x\n", s->cr_index, val);
 #endif
             break;

-        case 0x3ba:
-        case 0x3da:
+        case VGA_IS1_RM:
+        case VGA_IS1_RC:

             /* just toggle to fool polling */
             val = s->st01 = s->retrace(s);
             s->ar_flip_flop = 0;
             /* just toggle to fool polling */
             val = s->st01 = s->retrace(s);
             s->ar_flip_flop = 0;


@@ -402,29 +458,29 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 #endif
 
     switch(addr) {
 #endif
 
     switch(addr) {

-    case 0x3c0:
+    case VGA_ATT_W:

         if (s->ar_flip_flop == 0) {
             val &= 0x3f;
             s->ar_index = val;
         } else {
             index = s->ar_index & 0x1f;
             switch(index) {
         if (s->ar_flip_flop == 0) {
             val &= 0x3f;
             s->ar_index = val;
         } else {
             index = s->ar_index & 0x1f;
             switch(index) {

-            case 0x00 ... 0x0f:
+            case VGA_ATC_PALETTE0 ... VGA_ATC_PALETTEF:

                 s->ar[index] = val & 0x3f;
                 break;
                 s->ar[index] = val & 0x3f;
                 break;

-            case 0x10:
+            case VGA_ATC_MODE:

                 s->ar[index] = val & ~0x10;
                 break;
                 s->ar[index] = val & ~0x10;
                 break;

-            case 0x11:
+            case VGA_ATC_OVERSCAN:

                 s->ar[index] = val;
                 break;
                 s->ar[index] = val;
                 break;

-            case 0x12:
+            case VGA_ATC_PLANE_ENABLE:

                 s->ar[index] = val & ~0xc0;
                 break;
                 s->ar[index] = val & ~0xc0;
                 break;

-            case 0x13:
+            case VGA_ATC_PEL:

                 s->ar[index] = val & ~0xf0;
                 break;
                 s->ar[index] = val & ~0xf0;
                 break;

-            case 0x14:
+            case VGA_ATC_COLOR_PAGE:

                 s->ar[index] = val & ~0xf0;
                 break;
             default:
                 s->ar[index] = val & ~0xf0;
                 break;
             default:


@@ -433,31 +489,34 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
         }
         s->ar_flip_flop ^= 1;
         break;
         }
         s->ar_flip_flop ^= 1;
         break;

-    case 0x3c2:
+    case VGA_MIS_W:

         s->msr = val & ~0x10;
         s->update_retrace_info(s);
         break;
         s->msr = val & ~0x10;
         s->update_retrace_info(s);
         break;

-    case 0x3c4:
+    case VGA_SEQ_I:

         s->sr_index = val & 7;
         break;
         s->sr_index = val & 7;
         break;

-    case 0x3c5:
+    case VGA_SEQ_D:

 #ifdef DEBUG_VGA_REG
         printf("vga: write SR%x = 0x%02x\n", s->sr_index, val);
 #endif
         s->sr[s->sr_index] = val & sr_mask[s->sr_index];
 #ifdef DEBUG_VGA_REG
         printf("vga: write SR%x = 0x%02x\n", s->sr_index, val);
 #endif
         s->sr[s->sr_index] = val & sr_mask[s->sr_index];

-        if (s->sr_index == 1) s->update_retrace_info(s);
+        if (s->sr_index == VGA_SEQ_CLOCK_MODE) {
+            s->update_retrace_info(s);
+        }
+        vga_update_memory_access(s);

         break;
         break;

-    case 0x3c7:
+    case VGA_PEL_IR:

         s->dac_read_index = val;
         s->dac_sub_index = 0;
         s->dac_state = 3;
         break;
         s->dac_read_index = val;
         s->dac_sub_index = 0;
         s->dac_state = 3;
         break;

-    case 0x3c8:
+    case VGA_PEL_IW:

         s->dac_write_index = val;
         s->dac_sub_index = 0;
         s->dac_state = 0;
         break;
         s->dac_write_index = val;
         s->dac_sub_index = 0;
         s->dac_state = 0;
         break;

-    case 0x3c9:
+    case VGA_PEL_D:

         s->dac_cache[s->dac_sub_index] = val;
         if (++s->dac_sub_index == 3) {
             memcpy(&s->palette[s->dac_write_index * 3], s->dac_cache, 3);
         s->dac_cache[s->dac_sub_index] = val;
         if (++s->dac_sub_index == 3) {
             memcpy(&s->palette[s->dac_write_index * 3], s->dac_cache, 3);


@@ -465,47 +524,51 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
             s->dac_write_index++;
         }
         break;
             s->dac_write_index++;
         }
         break;

-    case 0x3ce:
+    case VGA_GFX_I:

         s->gr_index = val & 0x0f;
         break;
         s->gr_index = val & 0x0f;
         break;

-    case 0x3cf:
+    case VGA_GFX_D:

 #ifdef DEBUG_VGA_REG
         printf("vga: write GR%x = 0x%02x\n", s->gr_index, val);
 #endif
         s->gr[s->gr_index] = val & gr_mask[s->gr_index];
 #ifdef DEBUG_VGA_REG
         printf("vga: write GR%x = 0x%02x\n", s->gr_index, val);
 #endif
         s->gr[s->gr_index] = val & gr_mask[s->gr_index];

+        vga_update_memory_access(s);

         break;
         break;

-    case 0x3b4:
-    case 0x3d4:
+    case VGA_CRT_IM:
+    case VGA_CRT_IC:

         s->cr_index = val;
         break;
         s->cr_index = val;
         break;

-    case 0x3b5:
-    case 0x3d5:
+    case VGA_CRT_DM:
+    case VGA_CRT_DC:

 #ifdef DEBUG_VGA_REG
         printf("vga: write CR%x = 0x%02x\n", s->cr_index, val);
 #endif
         /* handle CR0-7 protection */
 #ifdef DEBUG_VGA_REG
         printf("vga: write CR%x = 0x%02x\n", s->cr_index, val);
 #endif
         /* handle CR0-7 protection */

-        if ((s->cr[0x11] & 0x80) && s->cr_index <= 7) {
+        if ((s->cr[VGA_CRTC_V_SYNC_END] & VGA_CR11_LOCK_CR0_CR7) &&
+            s->cr_index <= VGA_CRTC_OVERFLOW) {

             /* can always write bit 4 of CR7 */
             /* can always write bit 4 of CR7 */

-            if (s->cr_index == 7)
-                s->cr[7] = (s->cr[7] & ~0x10) | (val & 0x10);
+            if (s->cr_index == VGA_CRTC_OVERFLOW) {
+                s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x10) |
+                    (val & 0x10);
+            }

             return;
         }
         s->cr[s->cr_index] = val;
 
         switch(s->cr_index) {
             return;
         }
         s->cr[s->cr_index] = val;
 
         switch(s->cr_index) {

-        case 0x00:
-        case 0x04:
-        case 0x05:
-        case 0x06:
-        case 0x07:
-        case 0x11:
-        case 0x17:
+        case VGA_CRTC_H_TOTAL:
+        case VGA_CRTC_H_SYNC_START:
+        case VGA_CRTC_H_SYNC_END:
+        case VGA_CRTC_V_TOTAL:
+        case VGA_CRTC_OVERFLOW:
+        case VGA_CRTC_V_SYNC_END:
+        case VGA_CRTC_MODE:

             s->update_retrace_info(s);
             break;
         }
         break;
             s->update_retrace_info(s);
             break;
         }
         break;

-    case 0x3ba:
-    case 0x3da:
+    case VGA_IS1_RM:
+    case VGA_IS1_RC:

         s->fcr = val & 0x10;
         break;
     }
         s->fcr = val & 0x10;
         break;
     }


@@ -606,6 +669,7 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
             }
             s->vbe_regs[s->vbe_index] = val;
             s->bank_offset = (val << 16);
             }
             s->vbe_regs[s->vbe_index] = val;
             s->bank_offset = (val << 16);

+            vga_update_memory_access(s);

             break;
         case VBE_DISPI_INDEX_ENABLE:
             if ((val & VBE_DISPI_ENABLED) &&
             break;
         case VBE_DISPI_INDEX_ENABLE:
             if ((val & VBE_DISPI_ENABLED) &&


@@ -634,37 +698,44 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
 
                 /* we initialize the VGA graphic mode (should be done
                    in BIOS) */
 
                 /* we initialize the VGA graphic mode (should be done
                    in BIOS) */

-                s->gr[0x06] = (s->gr[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
-                s->cr[0x17] |= 3; /* no CGA modes */
-                s->cr[0x13] = s->vbe_line_offset >> 3;
+                /* graphic mode + memory map 1 */
+                s->gr[VGA_GFX_MISC] = (s->gr[VGA_GFX_MISC] & ~0x0c) | 0x04 |
+                    VGA_GR06_GRAPHICS_MODE;
+                s->cr[VGA_CRTC_MODE] |= 3; /* no CGA modes */
+                s->cr[VGA_CRTC_OFFSET] = s->vbe_line_offset >> 3;

                 /* width */
                 /* width */

-                s->cr[0x01] = (s->vbe_regs[VBE_DISPI_INDEX_XRES] >> 3) - 1;
+                s->cr[VGA_CRTC_H_DISP] =
+                    (s->vbe_regs[VBE_DISPI_INDEX_XRES] >> 3) - 1;

                 /* height (only meaningful if < 1024) */
                 h = s->vbe_regs[VBE_DISPI_INDEX_YRES] - 1;
                 /* height (only meaningful if < 1024) */
                 h = s->vbe_regs[VBE_DISPI_INDEX_YRES] - 1;

-                s->cr[0x12] = h;
-                s->cr[0x07] = (s->cr[0x07] & ~0x42) |
+                s->cr[VGA_CRTC_V_DISP_END] = h;
+                s->cr[VGA_CRTC_OVERFLOW] = (s->cr[VGA_CRTC_OVERFLOW] & ~0x42) |

                     ((h >> 7) & 0x02) | ((h >> 3) & 0x40);
                 /* line compare to 1023 */
                     ((h >> 7) & 0x02) | ((h >> 3) & 0x40);
                 /* line compare to 1023 */

-                s->cr[0x18] = 0xff;
-                s->cr[0x07] |= 0x10;
-                s->cr[0x09] |= 0x40;
+                s->cr[VGA_CRTC_LINE_COMPARE] = 0xff;
+                s->cr[VGA_CRTC_OVERFLOW] |= 0x10;
+                s->cr[VGA_CRTC_MAX_SCAN] |= 0x40;

 
                 if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) {
                     shift_control = 0;
 
                 if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) {
                     shift_control = 0;

-                    s->sr[0x01] &= ~8; /* no double line */
+                    s->sr[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */

                 } else {
                     shift_control = 2;
                 } else {
                     shift_control = 2;

-                    s->sr[4] |= 0x08; /* set chain 4 mode */
-                    s->sr[2] |= 0x0f; /* activate all planes */
+                    /* set chain 4 mode */
+                    s->sr[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
+                    /* activate all planes */
+                    s->sr[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;

                 }
                 }

-                s->gr[0x05] = (s->gr[0x05] & ~0x60) | (shift_control << 5);
-                s->cr[0x09] &= ~0x9f; /* no double scan */
+                s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) |
+                    (shift_control << 5);
+                s->cr[VGA_CRTC_MAX_SCAN] &= ~0x9f; /* no double scan */

             } else {
                 /* XXX: the bios should do that */
                 s->bank_offset = 0;
             }
             s->dac_8bit = (val & VBE_DISPI_8BIT_DAC) > 0;
             s->vbe_regs[s->vbe_index] = val;
             } else {
                 /* XXX: the bios should do that */
                 s->bank_offset = 0;
             }
             s->dac_8bit = (val & VBE_DISPI_8BIT_DAC) > 0;
             s->vbe_regs[s->vbe_index] = val;

+            vga_update_memory_access(s);

             break;
         case VBE_DISPI_INDEX_VIRT_WIDTH:
             {
             break;
         case VBE_DISPI_INDEX_VIRT_WIDTH:
             {


@@ -714,7 +785,7 @@ uint32_t vga_mem_readb(VGACommonState *s, target_phys_addr_t addr)
     uint32_t ret;
 
     /* convert to VGA memory offset */
     uint32_t ret;
 
     /* convert to VGA memory offset */

-    memory_map_mode = (s->gr[6] >> 2) & 3;
+    memory_map_mode = (s->gr[VGA_GFX_MISC] >> 2) & 3;

     addr &= 0x1ffff;
     switch(memory_map_mode) {
     case 0:
     addr &= 0x1ffff;
     switch(memory_map_mode) {
     case 0:


@@ -737,24 +808,25 @@ uint32_t vga_mem_readb(VGACommonState *s, target_phys_addr_t addr)
         break;
     }
 
         break;
     }
 

-    if (s->sr[4] & 0x08) {
+    if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {

         /* chain 4 mode : simplest access */
         ret = s->vram_ptr[addr];
         /* chain 4 mode : simplest access */
         ret = s->vram_ptr[addr];

-    } else if (s->gr[5] & 0x10) {
+    } else if (s->gr[VGA_GFX_MODE] & 0x10) {

         /* odd/even mode (aka text mode mapping) */
         /* odd/even mode (aka text mode mapping) */

-        plane = (s->gr[4] & 2) | (addr & 1);
+        plane = (s->gr[VGA_GFX_PLANE_READ] & 2) | (addr & 1);

         ret = s->vram_ptr[((addr & ~1) << 1) | plane];
     } else {
         /* standard VGA latched access */
         s->latch = ((uint32_t *)s->vram_ptr)[addr];
 
         ret = s->vram_ptr[((addr & ~1) << 1) | plane];
     } else {
         /* standard VGA latched access */
         s->latch = ((uint32_t *)s->vram_ptr)[addr];
 

-        if (!(s->gr[5] & 0x08)) {
+        if (!(s->gr[VGA_GFX_MODE] & 0x08)) {

             /* read mode 0 */
             /* read mode 0 */

-            plane = s->gr[4];
+            plane = s->gr[VGA_GFX_PLANE_READ];

             ret = GET_PLANE(s->latch, plane);
         } else {
             /* read mode 1 */
             ret = GET_PLANE(s->latch, plane);
         } else {
             /* read mode 1 */

-            ret = (s->latch ^ mask16[s->gr[2]]) & mask16[s->gr[7]];
+            ret = (s->latch ^ mask16[s->gr[VGA_GFX_COMPARE_VALUE]]) &
+                mask16[s->gr[VGA_GFX_COMPARE_MASK]];

             ret |= ret >> 16;
             ret |= ret >> 8;
             ret = (~ret) & 0xff;
             ret |= ret >> 16;
             ret |= ret >> 8;
             ret = (~ret) & 0xff;


@@ -773,7 +845,7 @@ void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val)
     printf("vga: [0x" TARGET_FMT_plx "] = 0x%02x\n", addr, val);
 #endif
     /* convert to VGA memory offset */
     printf("vga: [0x" TARGET_FMT_plx "] = 0x%02x\n", addr, val);
 #endif
     /* convert to VGA memory offset */

-    memory_map_mode = (s->gr[6] >> 2) & 3;
+    memory_map_mode = (s->gr[VGA_GFX_MISC] >> 2) & 3;

     addr &= 0x1ffff;
     switch(memory_map_mode) {
     case 0:
     addr &= 0x1ffff;
     switch(memory_map_mode) {
     case 0:


@@ -796,67 +868,68 @@ void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val)
         break;
     }
 
         break;
     }
 

-    if (s->sr[4] & 0x08) {
+    if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {

         /* chain 4 mode : simplest access */
         plane = addr & 3;
         mask = (1 << plane);
         /* chain 4 mode : simplest access */
         plane = addr & 3;
         mask = (1 << plane);

-        if (s->sr[2] & mask) {
+        if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {

             s->vram_ptr[addr] = val;
 #ifdef DEBUG_VGA_MEM
             printf("vga: chain4: [0x" TARGET_FMT_plx "]\n", addr);
 #endif
             s->plane_updated |= mask; /* only used to detect font change */
             s->vram_ptr[addr] = val;
 #ifdef DEBUG_VGA_MEM
             printf("vga: chain4: [0x" TARGET_FMT_plx "]\n", addr);
 #endif
             s->plane_updated |= mask; /* only used to detect font change */

-            memory_region_set_dirty(&s->vram, addr);
+            memory_region_set_dirty(&s->vram, addr, 1);

         }
         }

-    } else if (s->gr[5] & 0x10) {
+    } else if (s->gr[VGA_GFX_MODE] & 0x10) {

         /* odd/even mode (aka text mode mapping) */
         /* odd/even mode (aka text mode mapping) */

-        plane = (s->gr[4] & 2) | (addr & 1);
+        plane = (s->gr[VGA_GFX_PLANE_READ] & 2) | (addr & 1);

         mask = (1 << plane);
         mask = (1 << plane);

-        if (s->sr[2] & mask) {
+        if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {

             addr = ((addr & ~1) << 1) | plane;
             s->vram_ptr[addr] = val;
 #ifdef DEBUG_VGA_MEM
             printf("vga: odd/even: [0x" TARGET_FMT_plx "]\n", addr);
 #endif
             s->plane_updated |= mask; /* only used to detect font change */
             addr = ((addr & ~1) << 1) | plane;
             s->vram_ptr[addr] = val;
 #ifdef DEBUG_VGA_MEM
             printf("vga: odd/even: [0x" TARGET_FMT_plx "]\n", addr);
 #endif
             s->plane_updated |= mask; /* only used to detect font change */

-            memory_region_set_dirty(&s->vram, addr);
+            memory_region_set_dirty(&s->vram, addr, 1);

         }
     } else {
         /* standard VGA latched access */
         }
     } else {
         /* standard VGA latched access */

-        write_mode = s->gr[5] & 3;
+        write_mode = s->gr[VGA_GFX_MODE] & 3;

         switch(write_mode) {
         default:
         case 0:
             /* rotate */
         switch(write_mode) {
         default:
         case 0:
             /* rotate */

-            b = s->gr[3] & 7;
+            b = s->gr[VGA_GFX_DATA_ROTATE] & 7;

             val = ((val >> b) | (val << (8 - b))) & 0xff;
             val |= val << 8;
             val |= val << 16;
 
             /* apply set/reset mask */
             val = ((val >> b) | (val << (8 - b))) & 0xff;
             val |= val << 8;
             val |= val << 16;
 
             /* apply set/reset mask */

-            set_mask = mask16[s->gr[1]];
-            val = (val & ~set_mask) | (mask16[s->gr[0]] & set_mask);
-            bit_mask = s->gr[8];
+            set_mask = mask16[s->gr[VGA_GFX_SR_ENABLE]];
+            val = (val & ~set_mask) |
+                (mask16[s->gr[VGA_GFX_SR_VALUE]] & set_mask);
+            bit_mask = s->gr[VGA_GFX_BIT_MASK];

             break;
         case 1:
             val = s->latch;
             goto do_write;
         case 2:
             val = mask16[val & 0x0f];
             break;
         case 1:
             val = s->latch;
             goto do_write;
         case 2:
             val = mask16[val & 0x0f];

-            bit_mask = s->gr[8];
+            bit_mask = s->gr[VGA_GFX_BIT_MASK];

             break;
         case 3:
             /* rotate */
             break;
         case 3:
             /* rotate */

-            b = s->gr[3] & 7;
+            b = s->gr[VGA_GFX_DATA_ROTATE] & 7;

             val = (val >> b) | (val << (8 - b));
 
             val = (val >> b) | (val << (8 - b));
 

-            bit_mask = s->gr[8] & val;
-            val = mask16[s->gr[0]];
+            bit_mask = s->gr[VGA_GFX_BIT_MASK] & val;
+            val = mask16[s->gr[VGA_GFX_SR_VALUE]];

             break;
         }
 
         /* apply logical operation */
             break;
         }
 
         /* apply logical operation */

-        func_select = s->gr[3] >> 3;
+        func_select = s->gr[VGA_GFX_DATA_ROTATE] >> 3;

         switch(func_select) {
         case 0:
         default:
         switch(func_select) {
         case 0:
         default:


@@ -883,7 +956,7 @@ void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val)
 
     do_write:
         /* mask data according to sr[2] */
 
     do_write:
         /* mask data according to sr[2] */

-        mask = s->sr[2];
+        mask = s->sr[VGA_SEQ_PLANE_WRITE];

         s->plane_updated |= mask; /* only used to detect font change */
         write_mask = mask16[mask];
         ((uint32_t *)s->vram_ptr)[addr] =
         s->plane_updated |= mask; /* only used to detect font change */
         write_mask = mask16[mask];
         ((uint32_t *)s->vram_ptr)[addr] =


@@ -893,7 +966,7 @@ void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val)
         printf("vga: latch: [0x" TARGET_FMT_plx "] mask=0x%08x val=0x%08x\n",
                addr * 4, write_mask, val);
 #endif
         printf("vga: latch: [0x" TARGET_FMT_plx "] mask=0x%08x val=0x%08x\n",
                addr * 4, write_mask, val);
 #endif

-        memory_region_set_dirty(&s->vram, addr << 2);
+        memory_region_set_dirty(&s->vram, addr << 2, sizeof(uint32_t));

     }
 }
 
     }
 }
 


@@ -997,10 +1070,11 @@ static int update_palette16(VGACommonState *s)
     palette = s->last_palette;
     for(i = 0; i < 16; i++) {
         v = s->ar[i];
     palette = s->last_palette;
     for(i = 0; i < 16; i++) {
         v = s->ar[i];

-        if (s->ar[0x10] & 0x80)
-            v = ((s->ar[0x14] & 0xf) << 4) | (v & 0xf);
-        else
-            v = ((s->ar[0x14] & 0xc) << 4) | (v & 0x3f);
+        if (s->ar[VGA_ATC_MODE] & 0x80) {
+            v = ((s->ar[VGA_ATC_COLOR_PAGE] & 0xf) << 4) | (v & 0xf);
+        } else {
+            v = ((s->ar[VGA_ATC_COLOR_PAGE] & 0xc) << 4) | (v & 0x3f);
+        }

         v = v * 3;
         col = s->rgb_to_pixel(c6_to_8(s->palette[v]),
                               c6_to_8(s->palette[v + 1]),
         v = v * 3;
         col = s->rgb_to_pixel(c6_to_8(s->palette[v]),
                               c6_to_8(s->palette[v + 1]),


@@ -1056,16 +1130,17 @@ static void vga_get_offsets(VGACommonState *s,
 #endif
     {
         /* compute line_offset in bytes */
 #endif
     {
         /* compute line_offset in bytes */

-        line_offset = s->cr[0x13];
+        line_offset = s->cr[VGA_CRTC_OFFSET];

         line_offset <<= 3;
 
         /* starting address */
         line_offset <<= 3;
 
         /* starting address */

-        start_addr = s->cr[0x0d] | (s->cr[0x0c] << 8);
+        start_addr = s->cr[VGA_CRTC_START_LO] |
+            (s->cr[VGA_CRTC_START_HI] << 8);

 
         /* line compare */
 
         /* line compare */

-        line_compare = s->cr[0x18] |
-            ((s->cr[0x07] & 0x10) << 4) |
-            ((s->cr[0x09] & 0x40) << 3);
+        line_compare = s->cr[VGA_CRTC_LINE_COMPARE] |
+            ((s->cr[VGA_CRTC_OVERFLOW] & 0x10) << 4) |
+            ((s->cr[VGA_CRTC_MAX_SCAN] & 0x40) << 3);

     }
     *pline_offset = line_offset;
     *pstart_addr = start_addr;
     }
     *pline_offset = line_offset;
     *pstart_addr = start_addr;


@@ -1168,20 +1243,22 @@ static void vga_get_text_resolution(VGACommonState *s, int *pwidth, int *pheight
     int width, cwidth, height, cheight;
 
     /* total width & height */
     int width, cwidth, height, cheight;
 
     /* total width & height */

-    cheight = (s->cr[9] & 0x1f) + 1;
+    cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;

     cwidth = 8;
     cwidth = 8;

-    if (!(s->sr[1] & 0x01))
+    if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {

         cwidth = 9;
         cwidth = 9;

-    if (s->sr[1] & 0x08)
+    }
+    if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {

         cwidth = 16; /* NOTE: no 18 pixel wide */
         cwidth = 16; /* NOTE: no 18 pixel wide */

-    width = (s->cr[0x01] + 1);
-    if (s->cr[0x06] == 100) {
+    }
+    width = (s->cr[VGA_CRTC_H_DISP] + 1);
+    if (s->cr[VGA_CRTC_V_TOTAL] == 100) {

         /* ugly hack for CGA 160x100x16 - explain me the logic */
         height = 100;
     } else {
         /* ugly hack for CGA 160x100x16 - explain me the logic */
         height = 100;
     } else {

-        height = s->cr[0x12] |
-            ((s->cr[0x07] & 0x02) << 7) |
-            ((s->cr[0x07] & 0x40) << 3);
+        height = s->cr[VGA_CRTC_V_DISP_END] |
+            ((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) |
+            ((s->cr[VGA_CRTC_OVERFLOW] & 0x40) << 3);

         height = (height + 1) / cheight;
     }
 
         height = (height + 1) / cheight;
     }
 


@@ -1225,7 +1302,7 @@ static void vga_draw_text(VGACommonState *s, int full_update)
     vga_draw_glyph9_func *vga_draw_glyph9;
 
     /* compute font data address (in plane 2) */
     vga_draw_glyph9_func *vga_draw_glyph9;
 
     /* compute font data address (in plane 2) */

-    v = s->sr[3];
+    v = s->sr[VGA_SEQ_CHARACTER_MAP];

     offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2;
     if (offset != s->font_offsets[0]) {
         s->font_offsets[0] = offset;
     offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2;
     if (offset != s->font_offsets[0]) {
         s->font_offsets[0] = offset;


@@ -1239,7 +1316,7 @@ static void vga_draw_text(VGACommonState *s, int full_update)
         s->font_offsets[1] = offset;
         full_update = 1;
     }
         s->font_offsets[1] = offset;
         full_update = 1;
     }

-    if (s->plane_updated & (1 << 2)) {
+    if (s->plane_updated & (1 << 2) || s->chain4_alias) {

         /* if the plane 2 was modified since the last display, it
            indicates the font may have been modified */
         s->plane_updated = 0;
         /* if the plane 2 was modified since the last display, it
            indicates the font may have been modified */
         s->plane_updated = 0;


@@ -1250,6 +1327,10 @@ static void vga_draw_text(VGACommonState *s, int full_update)
     line_offset = s->line_offset;
 
     vga_get_text_resolution(s, &width, &height, &cw, &cheight);
     line_offset = s->line_offset;
 
     vga_get_text_resolution(s, &width, &height, &cw, &cheight);

+    if ((height * width) <= 1) {
+        /* better than nothing: exit if transient size is too small */
+        return;
+    }

     if ((height * width) > CH_ATTR_SIZE) {
         /* better than nothing: exit if transient size is too big */
         return;
     if ((height * width) > CH_ATTR_SIZE) {
         /* better than nothing: exit if transient size is too big */
         return;


@@ -1273,10 +1354,11 @@ static void vga_draw_text(VGACommonState *s, int full_update)
     palette = s->last_palette;
     x_incr = cw * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
 
     palette = s->last_palette;
     x_incr = cw * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
 

-    cursor_offset = ((s->cr[0x0e] << 8) | s->cr[0x0f]) - s->start_addr;
+    cursor_offset = ((s->cr[VGA_CRTC_CURSOR_HI] << 8) |
+                     s->cr[VGA_CRTC_CURSOR_LO]) - s->start_addr;

     if (cursor_offset != s->cursor_offset ||
     if (cursor_offset != s->cursor_offset ||

-        s->cr[0xa] != s->cursor_start ||
-        s->cr[0xb] != s->cursor_end) {
+        s->cr[VGA_CRTC_CURSOR_START] != s->cursor_start ||
+        s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end) {

       /* if the cursor position changed, we update the old and new
          chars */
         if (s->cursor_offset < CH_ATTR_SIZE)
       /* if the cursor position changed, we update the old and new
          chars */
         if (s->cursor_offset < CH_ATTR_SIZE)


@@ -1284,8 +1366,8 @@ static void vga_draw_text(VGACommonState *s, int full_update)
         if (cursor_offset < CH_ATTR_SIZE)
             s->last_ch_attr[cursor_offset] = -1;
         s->cursor_offset = cursor_offset;
         if (cursor_offset < CH_ATTR_SIZE)
             s->last_ch_attr[cursor_offset] = -1;
         s->cursor_offset = cursor_offset;

-        s->cursor_start = s->cr[0xa];
-        s->cursor_end = s->cr[0xb];
+        s->cursor_start = s->cr[VGA_CRTC_CURSOR_START];
+        s->cursor_end = s->cr[VGA_CRTC_CURSOR_END];

     }
     cursor_ptr = s->vram_ptr + (s->start_addr + cursor_offset) * 4;
 
     }
     cursor_ptr = s->vram_ptr + (s->start_addr + cursor_offset) * 4;
 


@@ -1330,17 +1412,19 @@ static void vga_draw_text(VGACommonState *s, int full_update)
                                     font_ptr, cheight, fgcol, bgcol);
                 } else {
                     dup9 = 0;
                                     font_ptr, cheight, fgcol, bgcol);
                 } else {
                     dup9 = 0;

-                    if (ch >= 0xb0 && ch <= 0xdf && (s->ar[0x10] & 0x04))
+                    if (ch >= 0xb0 && ch <= 0xdf &&
+                        (s->ar[VGA_ATC_MODE] & 0x04)) {

                         dup9 = 1;
                         dup9 = 1;

+                    }

                     vga_draw_glyph9(d1, linesize,
                                     font_ptr, cheight, fgcol, bgcol, dup9);
                 }
                 if (src == cursor_ptr &&
                     vga_draw_glyph9(d1, linesize,
                                     font_ptr, cheight, fgcol, bgcol, dup9);
                 }
                 if (src == cursor_ptr &&

-                    !(s->cr[0x0a] & 0x20)) {
+                    !(s->cr[VGA_CRTC_CURSOR_START] & 0x20)) {

                     int line_start, line_last, h;
                     /* draw the cursor */
                     int line_start, line_last, h;
                     /* draw the cursor */

-                    line_start = s->cr[0x0a] & 0x1f;
-                    line_last = s->cr[0x0b] & 0x1f;
+                    line_start = s->cr[VGA_CRTC_CURSOR_START] & 0x1f;
+                    line_last = s->cr[VGA_CRTC_CURSOR_END] & 0x1f;

                     /* XXX: check that */
                     if (line_last > cheight - 1)
                         line_last = cheight - 1;
                     /* XXX: check that */
                     if (line_last > cheight - 1)
                         line_last = cheight - 1;


@@ -1496,10 +1580,10 @@ static void vga_get_resolution(VGACommonState *s, int *pwidth, int *pheight)
     } else
 #endif
     {
     } else
 #endif
     {

-        width = (s->cr[0x01] + 1) * 8;
-        height = s->cr[0x12] |
-            ((s->cr[0x07] & 0x02) << 7) |
-            ((s->cr[0x07] & 0x40) << 3);
+        width = (s->cr[VGA_CRTC_H_DISP] + 1) * 8;
+        height = s->cr[VGA_CRTC_V_DISP_END] |
+            ((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) |
+            ((s->cr[VGA_CRTC_OVERFLOW] & 0x40) << 3);

         height = (height + 1);
     }
     *pwidth = width;
         height = (height + 1);
     }
     *pwidth = width;


@@ -1533,12 +1617,6 @@ void vga_dirty_log_stop(VGACommonState *s)
     memory_region_set_log(&s->vram, false, DIRTY_MEMORY_VGA);
 }
 
     memory_region_set_log(&s->vram, false, DIRTY_MEMORY_VGA);
 }
 

-void vga_dirty_log_restart(VGACommonState *s)
-{
-    vga_dirty_log_stop(s);
-    vga_dirty_log_start(s);
-}
-

 /*
  * graphic modes
  */
 /*
  * graphic modes
  */


@@ -1560,10 +1638,11 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
     s->get_resolution(s, &width, &height);
     disp_width = width;
 
     s->get_resolution(s, &width, &height);
     disp_width = width;
 

-    shift_control = (s->gr[0x05] >> 5) & 3;
-    double_scan = (s->cr[0x09] >> 7);
+    shift_control = (s->gr[VGA_GFX_MODE] >> 5) & 3;
+    double_scan = (s->cr[VGA_CRTC_MAX_SCAN] >> 7);

     if (shift_control != 1) {
     if (shift_control != 1) {

-        multi_scan = (((s->cr[0x09] & 0x1f) + 1) << double_scan) - 1;
+        multi_scan = (((s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1) << double_scan)
+            - 1;

     } else {
         /* in CGA modes, multi_scan is ignored */
         /* XXX: is it correct ? */
     } else {
         /* in CGA modes, multi_scan is ignored */
         /* XXX: is it correct ? */


@@ -1578,11 +1657,11 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
     }
 
     if (shift_control == 0) {
     }
 
     if (shift_control == 0) {

-        if (s->sr[0x01] & 8) {
+        if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {

             disp_width <<= 1;
         }
     } else if (shift_control == 1) {
             disp_width <<= 1;
         }
     } else if (shift_control == 1) {

-        if (s->sr[0x01] & 8) {
+        if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {

             disp_width <<= 1;
         }
     }
             disp_width <<= 1;
         }
     }


@@ -1626,7 +1705,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
 
     if (shift_control == 0) {
         full_update |= update_palette16(s);
 
     if (shift_control == 0) {
         full_update |= update_palette16(s);

-        if (s->sr[0x01] & 8) {
+        if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {

             v = VGA_DRAW_LINE4D2;
         } else {
             v = VGA_DRAW_LINE4;
             v = VGA_DRAW_LINE4D2;
         } else {
             v = VGA_DRAW_LINE4;


@@ -1634,7 +1713,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
         bits = 4;
     } else if (shift_control == 1) {
         full_update |= update_palette16(s);
         bits = 4;
     } else if (shift_control == 1) {
         full_update |= update_palette16(s);

-        if (s->sr[0x01] & 8) {
+        if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {

             v = VGA_DRAW_LINE2D2;
         } else {
             v = VGA_DRAW_LINE2;
             v = VGA_DRAW_LINE2D2;
         } else {
             v = VGA_DRAW_LINE2;


@@ -1679,7 +1758,8 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
     line_offset = s->line_offset;
 #if 0
     printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
     line_offset = s->line_offset;
 #if 0
     printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",

-           width, height, v, line_offset, s->cr[9], s->cr[0x17], s->line_compare, s->sr[0x01]);
+           width, height, v, line_offset, s->cr[9], s->cr[VGA_CRTC_MODE],
+           s->line_compare, s->sr[VGA_SEQ_CLOCK_MODE]);

 #endif
     addr1 = (s->start_addr * 4);
     bwidth = (width * bits + 7) / 8;
 #endif
     addr1 = (s->start_addr * 4);
     bwidth = (width * bits + 7) / 8;


@@ -1691,26 +1771,20 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
     y1 = 0;
     for(y = 0; y < height; y++) {
         addr = addr1;
     y1 = 0;
     for(y = 0; y < height; y++) {
         addr = addr1;

-        if (!(s->cr[0x17] & 1)) {
+        if (!(s->cr[VGA_CRTC_MODE] & 1)) {

             int shift;
             /* CGA compatibility handling */
             int shift;
             /* CGA compatibility handling */

-            shift = 14 + ((s->cr[0x17] >> 6) & 1);
+            shift = 14 + ((s->cr[VGA_CRTC_MODE] >> 6) & 1);

             addr = (addr & ~(1 << shift)) | ((y1 & 1) << shift);
         }
             addr = (addr & ~(1 << shift)) | ((y1 & 1) << shift);
         }

-        if (!(s->cr[0x17] & 2)) {
+        if (!(s->cr[VGA_CRTC_MODE] & 2)) {

             addr = (addr & ~0x8000) | ((y1 & 2) << 14);
         }
             addr = (addr & ~0x8000) | ((y1 & 2) << 14);
         }

-        page0 = addr & TARGET_PAGE_MASK;
-        page1 = (addr + bwidth - 1) & TARGET_PAGE_MASK;
-        update = full_update |
-            memory_region_get_dirty(&s->vram, page0, DIRTY_MEMORY_VGA) |
-            memory_region_get_dirty(&s->vram, page1, DIRTY_MEMORY_VGA);
-        if ((page1 - page0) > TARGET_PAGE_SIZE) {
-            /* if wide line, can use another page */
-            update |= memory_region_get_dirty(&s->vram,
-                                              page0 + TARGET_PAGE_SIZE,
-                                              DIRTY_MEMORY_VGA);
-        }
+        update = full_update;
+        page0 = addr;
+        page1 = addr + bwidth - 1;
+        update |= memory_region_get_dirty(&s->vram, page0, page1 - page0,
+                                          DIRTY_MEMORY_VGA);

         /* explicit invalidation for the hardware cursor */
         update |= (s->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1;
         if (update) {
         /* explicit invalidation for the hardware cursor */
         update |= (s->invalidated_y_table[y >> 5] >> (y & 0x1f)) & 1;
         if (update) {


@@ -1734,7 +1808,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
             }
         }
         if (!multi_run) {
             }
         }
         if (!multi_run) {

-            mask = (s->cr[0x17] & 3) ^ 3;
+            mask = (s->cr[VGA_CRTC_MODE] & 3) ^ 3;

             if ((y1 & mask) == mask)
                 addr1 += line_offset;
             y1++;
             if ((y1 & mask) == mask)
                 addr1 += line_offset;
             y1++;


@@ -1756,7 +1830,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
     if (page_max >= page_min) {
         memory_region_reset_dirty(&s->vram,
                                   page_min,
     if (page_max >= page_min) {
         memory_region_reset_dirty(&s->vram,
                                   page_min,

-                                  page_max + TARGET_PAGE_SIZE - page_min,
+                                  page_max - page_min,

                                   DIRTY_MEMORY_VGA);
     }
     memset(s->invalidated_y_table, 0, ((height + 31) >> 5) * 4);
                                   DIRTY_MEMORY_VGA);
     }
     memset(s->invalidated_y_table, 0, ((height + 31) >> 5) * 4);


@@ -1797,6 +1871,8 @@ static void vga_update_display(void *opaque)
     VGACommonState *s = opaque;
     int full_update, graphic_mode;
 
     VGACommonState *s = opaque;
     int full_update, graphic_mode;
 

+    qemu_flush_coalesced_mmio_buffer();
+

     if (ds_get_bits_per_pixel(s->ds) == 0) {
         /* nothing to do */
     } else {
     if (ds_get_bits_per_pixel(s->ds) == 0) {
         /* nothing to do */
     } else {


@@ -1804,7 +1880,7 @@ static void vga_update_display(void *opaque)
         if (!(s->ar_index & 0x20)) {
             graphic_mode = GMODE_BLANK;
         } else {
         if (!(s->ar_index & 0x20)) {
             graphic_mode = GMODE_BLANK;
         } else {

-            graphic_mode = s->gr[6] & 1;
+            graphic_mode = s->gr[VGA_GFX_MISC] & VGA_GR06_GRAPHICS_MODE;

         }
         if (graphic_mode != s->graphic_mode) {
             s->graphic_mode = graphic_mode;
         }
         if (graphic_mode != s->graphic_mode) {
             s->graphic_mode = graphic_mode;


@@ -1892,6 +1968,7 @@ void vga_common_reset(VGACommonState *s)
         memset(&s->retrace_info, 0, sizeof (s->retrace_info));
         break;
     }
         memset(&s->retrace_info, 0, sizeof (s->retrace_info));
         break;
     }

+    vga_update_memory_access(s);

 }
 
 static void vga_reset(void *opaque)
 }
 
 static void vga_reset(void *opaque)


@@ -1916,10 +1993,12 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
     char msg_buffer[80];
     int full_update = 0;
 
     char msg_buffer[80];
     int full_update = 0;
 

+    qemu_flush_coalesced_mmio_buffer();
+

     if (!(s->ar_index & 0x20)) {
         graphic_mode = GMODE_BLANK;
     } else {
     if (!(s->ar_index & 0x20)) {
         graphic_mode = GMODE_BLANK;
     } else {

-        graphic_mode = s->gr[6] & 1;
+        graphic_mode = s->gr[VGA_GFX_MISC] & VGA_GR06_GRAPHICS_MODE;

     }
     if (graphic_mode != s->graphic_mode) {
         s->graphic_mode = graphic_mode;
     }
     if (graphic_mode != s->graphic_mode) {
         s->graphic_mode = graphic_mode;


@@ -1936,20 +2015,22 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
         full_update |= update_basic_params(s);
 
         /* total width & height */
         full_update |= update_basic_params(s);
 
         /* total width & height */

-        cheight = (s->cr[9] & 0x1f) + 1;
+        cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;

         cw = 8;
         cw = 8;

-        if (!(s->sr[1] & 0x01))
+        if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {

             cw = 9;
             cw = 9;

-        if (s->sr[1] & 0x08)
+        }
+        if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {

             cw = 16; /* NOTE: no 18 pixel wide */
             cw = 16; /* NOTE: no 18 pixel wide */

-        width = (s->cr[0x01] + 1);
-        if (s->cr[0x06] == 100) {
+        }
+        width = (s->cr[VGA_CRTC_H_DISP] + 1);
+        if (s->cr[VGA_CRTC_V_TOTAL] == 100) {

             /* ugly hack for CGA 160x100x16 - explain me the logic */
             height = 100;
         } else {
             /* ugly hack for CGA 160x100x16 - explain me the logic */
             height = 100;
         } else {

-            height = s->cr[0x12] | 
-                ((s->cr[0x07] & 0x02) << 7) | 
-                ((s->cr[0x07] & 0x40) << 3);
+            height = s->cr[VGA_CRTC_V_DISP_END] |
+                ((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) |
+                ((s->cr[VGA_CRTC_OVERFLOW] & 0x40) << 3);

             height = (height + 1) / cheight;
         }
 
             height = (height + 1) / cheight;
         }
 


@@ -1978,11 +2059,12 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
         }
 
         /* Update "hardware" cursor */
         }
 
         /* Update "hardware" cursor */

-        cursor_offset = ((s->cr[0x0e] << 8) | s->cr[0x0f]) - s->start_addr;
+        cursor_offset = ((s->cr[VGA_CRTC_CURSOR_HI] << 8) |
+                         s->cr[VGA_CRTC_CURSOR_LO]) - s->start_addr;

         if (cursor_offset != s->cursor_offset ||
         if (cursor_offset != s->cursor_offset ||

-            s->cr[0xa] != s->cursor_start ||
-            s->cr[0xb] != s->cursor_end || full_update) {
-            cursor_visible = !(s->cr[0xa] & 0x20);
+            s->cr[VGA_CRTC_CURSOR_START] != s->cursor_start ||
+            s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end || full_update) {
+            cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20);

             if (cursor_visible && cursor_offset < size && cursor_offset >= 0)
                 dpy_cursor(s->ds,
                            TEXTMODE_X(cursor_offset),
             if (cursor_visible && cursor_offset < size && cursor_offset >= 0)
                 dpy_cursor(s->ds,
                            TEXTMODE_X(cursor_offset),


@@ -1990,8 +2072,8 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
             else
                 dpy_cursor(s->ds, -1, -1);
             s->cursor_offset = cursor_offset;
             else
                 dpy_cursor(s->ds, -1, -1);
             s->cursor_offset = cursor_offset;

-            s->cursor_start = s->cr[0xa];
-            s->cursor_end = s->cr[0xb];
+            s->cursor_start = s->cr[VGA_CRTC_CURSOR_START];
+            s->cursor_end = s->cr[VGA_CRTC_CURSOR_END];

         }
 
         src = (uint32_t *) s->vram_ptr + s->start_addr;
         }
 
         src = (uint32_t *) s->vram_ptr + s->start_addr;


@@ -2143,7 +2225,7 @@ const VMStateDescription vmstate_vga_common = {
     }
 };
 
     }
 };
 

-void vga_common_init(VGACommonState *s, int vga_ram_size)
+void vga_common_init(VGACommonState *s)

 {
     int i, j, v, b;
 
 {
     int i, j, v, b;
 


@@ -2170,14 +2252,23 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
         expand4to8[i] = v;
     }
 
         expand4to8[i] = v;
     }
 

+    /* valid range: 1 MB -> 256 MB */
+    s->vram_size = 1024 * 1024;
+    while (s->vram_size < (s->vram_size_mb << 20) &&
+           s->vram_size < (256 << 20)) {
+        s->vram_size <<= 1;
+    }
+    s->vram_size_mb = s->vram_size >> 20;
+

 #ifdef CONFIG_BOCHS_VBE
     s->is_vbe_vmstate = 1;
 #else
     s->is_vbe_vmstate = 0;
 #endif
 #ifdef CONFIG_BOCHS_VBE
     s->is_vbe_vmstate = 1;
 #else
     s->is_vbe_vmstate = 0;
 #endif

-    memory_region_init_ram(&s->vram, NULL, "vga.vram", vga_ram_size);
+    memory_region_init_ram(&s->vram, "vga.vram", s->vram_size);
+    vmstate_register_ram_global(&s->vram);
+    xen_register_framebuffer(&s->vram);

     s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
     s->vram_ptr = memory_region_get_ram_ptr(&s->vram);

-    s->vram_size = vga_ram_size;

     s->get_bpp = vga_get_bpp;
     s->get_offsets = vga_get_offsets;
     s->get_resolution = vga_get_resolution;
     s->get_bpp = vga_get_bpp;
     s->get_offsets = vga_get_offsets;
     s->get_resolution = vga_get_resolution;


@@ -2199,40 +2290,39 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
     vga_dirty_log_start(s);
 }
 
     vga_dirty_log_start(s);
 }
 

-/* used by both ISA and PCI */
-MemoryRegion *vga_init_io(VGACommonState *s)
-{
-    MemoryRegion *vga_mem;
-
-    register_ioport_write(0x3c0, 16, 1, vga_ioport_write, s);
-
-    register_ioport_write(0x3b4, 2, 1, vga_ioport_write, s);
-    register_ioport_write(0x3d4, 2, 1, vga_ioport_write, s);
-    register_ioport_write(0x3ba, 1, 1, vga_ioport_write, s);
-    register_ioport_write(0x3da, 1, 1, vga_ioport_write, s);
-
-    register_ioport_read(0x3c0, 16, 1, vga_ioport_read, s);
-
-    register_ioport_read(0x3b4, 2, 1, vga_ioport_read, s);
-    register_ioport_read(0x3d4, 2, 1, vga_ioport_read, s);
-    register_ioport_read(0x3ba, 1, 1, vga_ioport_read, s);
-    register_ioport_read(0x3da, 1, 1, vga_ioport_read, s);
+static const MemoryRegionPortio vga_portio_list[] = {
+    { 0x04,  2, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3b4 */
+    { 0x0a,  1, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3ba */
+    { 0x10, 16, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3c0 */
+    { 0x24,  2, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3d4 */
+    { 0x2a,  1, 1, .read = vga_ioport_read, .write = vga_ioport_write }, /* 3da */
+    PORTIO_END_OF_LIST(),
+};

 
 #ifdef CONFIG_BOCHS_VBE
 
 #ifdef CONFIG_BOCHS_VBE

-#if defined (TARGET_I386)
-    register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index, s);
-    register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data, s);
+static const MemoryRegionPortio vbe_portio_list[] = {
+    { 0, 1, 2, .read = vbe_ioport_read_index, .write = vbe_ioport_write_index },
+# ifdef TARGET_I386
+    { 1, 1, 2, .read = vbe_ioport_read_data, .write = vbe_ioport_write_data },
+# else
+    { 2, 1, 2, .read = vbe_ioport_read_data, .write = vbe_ioport_write_data },
+# endif
+    PORTIO_END_OF_LIST(),
+};
+#endif /* CONFIG_BOCHS_VBE */

 
 

-    register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index, s);
-    register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data, s);
-#else
-    register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index, s);
-    register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data, s);
+/* Used by both ISA and PCI */
+MemoryRegion *vga_init_io(VGACommonState *s,
+                          const MemoryRegionPortio **vga_ports,
+                          const MemoryRegionPortio **vbe_ports)
+{
+    MemoryRegion *vga_mem;

 
 

-    register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index, s);
-    register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data, s);
+    *vga_ports = vga_portio_list;
+    *vbe_ports = NULL;
+#ifdef CONFIG_BOCHS_VBE
+    *vbe_ports = vbe_portio_list;

 #endif
 #endif

-#endif /* CONFIG_BOCHS_VBE */

 
     vga_mem = g_malloc(sizeof(*vga_mem));
     memory_region_init_io(vga_mem, &vga_mem_ops, s,
 
     vga_mem = g_malloc(sizeof(*vga_mem));
     memory_region_init_io(vga_mem, &vga_mem_ops, s,


@@ -2241,52 +2331,54 @@ MemoryRegion *vga_init_io(VGACommonState *s)
     return vga_mem;
 }
 
     return vga_mem;
 }
 

-void vga_init(VGACommonState *s)
+void vga_init(VGACommonState *s, MemoryRegion *address_space,
+              MemoryRegion *address_space_io, bool init_vga_ports)

 {
     MemoryRegion *vga_io_memory;
 {
     MemoryRegion *vga_io_memory;

+    const MemoryRegionPortio *vga_ports, *vbe_ports;
+    PortioList *vga_port_list = g_new(PortioList, 1);
+    PortioList *vbe_port_list = g_new(PortioList, 1);

 
     qemu_register_reset(vga_reset, s);
 
     s->bank_offset = 0;
 
 
     qemu_register_reset(vga_reset, s);
 
     s->bank_offset = 0;
 

-    vga_io_memory = vga_init_io(s);
-    memory_region_add_subregion_overlap(get_system_memory(),
+    s->legacy_address_space = address_space;
+
+    vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports);
+    memory_region_add_subregion_overlap(address_space,

                                         isa_mem_base + 0x000a0000,
                                         vga_io_memory,
                                         1);
     memory_region_set_coalescing(vga_io_memory);
                                         isa_mem_base + 0x000a0000,
                                         vga_io_memory,
                                         1);
     memory_region_set_coalescing(vga_io_memory);

+    if (init_vga_ports) {
+        portio_list_init(vga_port_list, vga_ports, s, "vga");
+        portio_list_add(vga_port_list, address_space_io, 0x3b0);
+    }
+    if (vbe_ports) {
+        portio_list_init(vbe_port_list, vbe_ports, s, "vbe");
+        portio_list_add(vbe_port_list, address_space_io, 0x1ce);
+    }

 }
 
 }
 

-void vga_init_vbe(VGACommonState *s)
+void vga_init_vbe(VGACommonState *s, MemoryRegion *system_memory)

 {
 #ifdef CONFIG_BOCHS_VBE
 {
 #ifdef CONFIG_BOCHS_VBE

+    /* With pc-0.12 and below we map both the PCI BAR and the fixed VBE region,
+     * so use an alias to avoid double-mapping the same region.
+     */
+    memory_region_init_alias(&s->vram_vbe, "vram.vbe",
+                             &s->vram, 0, memory_region_size(&s->vram));

     /* XXX: use optimized standard vga accesses */
     /* XXX: use optimized standard vga accesses */

-    memory_region_add_subregion(get_system_memory(),
+    memory_region_add_subregion(system_memory,

                                 VBE_DISPI_LFB_PHYSICAL_ADDRESS,
                                 VBE_DISPI_LFB_PHYSICAL_ADDRESS,

-                                &s->vram);
+                                &s->vram_vbe);

     s->vbe_mapped = 1;
 #endif 
 }
 /********************************************************/
 /* vga screen dump */
 
     s->vbe_mapped = 1;
 #endif 
 }
 /********************************************************/
 /* vga screen dump */
 

-static void vga_save_dpy_update(DisplayState *ds,
-                                int x, int y, int w, int h)
-{
-    if (screen_dump_filename) {
-        ppm_save(screen_dump_filename, ds->surface);
-        screen_dump_filename = NULL;
-    }
-}
-
-static void vga_save_dpy_resize(DisplayState *s)
-{
-}
-
-static void vga_save_dpy_refresh(DisplayState *s)
-{
-}
-

 int ppm_save(const char *filename, struct DisplaySurface *ds)
 {
     FILE *f;
 int ppm_save(const char *filename, struct DisplaySurface *ds)
 {
     FILE *f;


@@ -2297,6 +2389,7 @@ int ppm_save(const char *filename, struct DisplaySurface *ds)
     int ret;
     char *linebuf, *pbuf;
 
     int ret;
     char *linebuf, *pbuf;
 

+    trace_ppm_save(filename, ds);

     f = fopen(filename, "wb");
     if (!f)
         return -1;
     f = fopen(filename, "wb");
     if (!f)
         return -1;


@@ -2312,12 +2405,10 @@ int ppm_save(const char *filename, struct DisplaySurface *ds)
                 v = *(uint32_t *)d;
             else
                 v = (uint32_t) (*(uint16_t *)d);
                 v = *(uint32_t *)d;
             else
                 v = (uint32_t) (*(uint16_t *)d);

-            r = ((v >> ds->pf.rshift) & ds->pf.rmax) * 256 /
-                (ds->pf.rmax + 1);
-            g = ((v >> ds->pf.gshift) & ds->pf.gmax) * 256 /
-                (ds->pf.gmax + 1);
-            b = ((v >> ds->pf.bshift) & ds->pf.bmax) * 256 /
-                (ds->pf.bmax + 1);
+            /* Limited to 8 or fewer bits per channel: */
+            r = ((v >> ds->pf.rshift) & ds->pf.rmax) << (8 - ds->pf.rbits);
+            g = ((v >> ds->pf.gshift) & ds->pf.gmax) << (8 - ds->pf.gbits);
+            b = ((v >> ds->pf.bshift) & ds->pf.bmax) << (8 - ds->pf.bbits);

             *pbuf++ = r;
             *pbuf++ = g;
             *pbuf++ = b;
             *pbuf++ = r;
             *pbuf++ = g;
             *pbuf++ = b;


@@ -2332,29 +2423,15 @@ int ppm_save(const char *filename, struct DisplaySurface *ds)
     return 0;
 }
 
     return 0;
 }
 

-static DisplayChangeListener* vga_screen_dump_init(DisplayState *ds)
-{
-    DisplayChangeListener *dcl;
-
-    dcl = g_malloc0(sizeof(DisplayChangeListener));
-    dcl->dpy_update = vga_save_dpy_update;
-    dcl->dpy_resize = vga_save_dpy_resize;
-    dcl->dpy_refresh = vga_save_dpy_refresh;
-    register_displaychangelistener(ds, dcl);
-    return dcl;
-}
-

 /* save the vga display in a PPM image even if no display is
    available */
 /* save the vga display in a PPM image even if no display is
    available */

-static void vga_screen_dump(void *opaque, const char *filename)
+static void vga_screen_dump(void *opaque, const char *filename, bool cswitch)

 {
     VGACommonState *s = opaque;
 
 {
     VGACommonState *s = opaque;
 

-    if (!screen_dump_dcl)
-        screen_dump_dcl = vga_screen_dump_init(s->ds);
-
-    screen_dump_filename = (char *)filename;
-    vga_invalidate_display(s);
+    if (cswitch) {
+        vga_invalidate_display(s);
+    }

     vga_hw_update();
     vga_hw_update();

+    ppm_save(filename, s->ds->surface);

 }
 }

-