-#include "vl.h"
-
-#define DEBUG_MIPSNET_SEND
-#define DEBUG_MIPSNET_RECEIVE
-//#define DEBUG_MIPSNET_DATA
-#define DEBUG_MIPSNET_IRQ
+#include "hw.h"
+#include "net.h"
+#include "trace.h"
+#include "sysbus.h"
/* MIPSnet register offsets */
#define MIPSNET_DEV_ID 0x00
-# define MIPSNET_DEV_ID_STRING "MIPSNET0"
#define MIPSNET_BUSY 0x08
#define MIPSNET_RX_DATA_COUNT 0x0c
#define MIPSNET_TX_DATA_COUNT 0x10
#define MAX_ETH_FRAME_SIZE 1514
typedef struct MIPSnetState {
+ SysBusDevice busdev;
+
uint32_t busy;
uint32_t rx_count;
uint32_t rx_read;
uint32_t intctl;
uint8_t rx_buffer[MAX_ETH_FRAME_SIZE];
uint8_t tx_buffer[MAX_ETH_FRAME_SIZE];
+ MemoryRegion io;
qemu_irq irq;
- VLANClientState *vc;
- NICInfo *nd;
+ NICState *nic;
+ NICConf conf;
} MIPSnetState;
static void mipsnet_reset(MIPSnetState *s)
static void mipsnet_update_irq(MIPSnetState *s)
{
int isr = !!s->intctl;
-#ifdef DEBUG_MIPSNET_IRQ
- printf("mipsnet: Set IRQ to %d (%02x)\n", isr, s->intctl);
-#endif
+ trace_mipsnet_irq(isr, s->intctl);
qemu_set_irq(s->irq, isr);
}
return 0;
}
-static int mipsnet_can_receive(void *opaque)
+static int mipsnet_can_receive(NetClientState *nc)
{
- MIPSnetState *s = opaque;
+ MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
if (s->busy)
return 0;
return !mipsnet_buffer_full(s);
}
-static void mipsnet_receive(void *opaque, const uint8_t *buf, int size)
+static ssize_t mipsnet_receive(NetClientState *nc, const uint8_t *buf, size_t size)
{
- MIPSnetState *s = opaque;
+ MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
-#ifdef DEBUG_MIPSNET_RECEIVE
- printf("mipsnet: receiving len=%d\n", size);
-#endif
- if (!mipsnet_can_receive(opaque))
- return;
+ trace_mipsnet_receive(size);
+ if (!mipsnet_can_receive(nc))
+ return -1;
s->busy = 1;
/* Now we can signal we have received something. */
s->intctl |= MIPSNET_INTCTL_RXDONE;
mipsnet_update_irq(s);
+
+ return size;
}
-static uint32_t mipsnet_ioport_read(void *opaque, uint32_t addr)
+static uint64_t mipsnet_ioport_read(void *opaque, hwaddr addr,
+ unsigned int size)
{
MIPSnetState *s = opaque;
int ret = 0;
- const char *devid = MIPSNET_DEV_ID_STRING;
addr &= 0x3f;
switch (addr) {
case MIPSNET_DEV_ID:
- ret = *((uint32_t *)&devid);
+ ret = be32_to_cpu(0x4d495053); /* MIPS */
break;
case MIPSNET_DEV_ID + 4:
- ret = *((uint32_t *)(&devid + 4));
+ ret = be32_to_cpu(0x4e455430); /* NET0 */
break;
case MIPSNET_BUSY:
ret = s->busy;
default:
break;
}
-#ifdef DEBUG_MIPSNET_DATA
- printf("mipsnet: read addr=0x%02x val=0x%02x\n", addr, ret);
-#endif
+ trace_mipsnet_read(addr, ret);
return ret;
}
-static void mipsnet_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+static void mipsnet_ioport_write(void *opaque, hwaddr addr,
+ uint64_t val, unsigned int size)
{
MIPSnetState *s = opaque;
addr &= 0x3f;
-#ifdef DEBUG_MIPSNET_DATA
- printf("mipsnet: write addr=0x%02x val=0x%02x\n", addr, val);
-#endif
+ trace_mipsnet_write(addr, val);
switch (addr) {
case MIPSNET_TX_DATA_COUNT:
s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0;
s->tx_buffer[s->tx_written++] = val;
if (s->tx_written == s->tx_count) {
/* Send buffer. */
-#ifdef DEBUG_MIPSNET_SEND
- printf("mipsnet: sending len=%d\n", s->tx_count);
-#endif
- qemu_send_packet(s->vc, s->tx_buffer, s->tx_count);
+ trace_mipsnet_send(s->tx_count);
+ qemu_send_packet(&s->nic->nc, s->tx_buffer, s->tx_count);
s->tx_count = s->tx_written = 0;
s->intctl |= MIPSNET_INTCTL_TXDONE;
s->busy = 1;
}
}
-static void mipsnet_save(QEMUFile *f, void *opaque)
+static const VMStateDescription vmstate_mipsnet = {
+ .name = "mipsnet",
+ .version_id = 0,
+ .minimum_version_id = 0,
+ .minimum_version_id_old = 0,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(busy, MIPSnetState),
+ VMSTATE_UINT32(rx_count, MIPSnetState),
+ VMSTATE_UINT32(rx_read, MIPSnetState),
+ VMSTATE_UINT32(tx_count, MIPSnetState),
+ VMSTATE_UINT32(tx_written, MIPSnetState),
+ VMSTATE_UINT32(intctl, MIPSnetState),
+ VMSTATE_BUFFER(rx_buffer, MIPSnetState),
+ VMSTATE_BUFFER(tx_buffer, MIPSnetState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void mipsnet_cleanup(NetClientState *nc)
{
- MIPSnetState *s = opaque;
+ MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
- qemu_put_be32s(f, &s->busy);
- qemu_put_be32s(f, &s->rx_count);
- qemu_put_be32s(f, &s->rx_read);
- qemu_put_be32s(f, &s->tx_count);
- qemu_put_be32s(f, &s->tx_written);
- qemu_put_be32s(f, &s->intctl);
- qemu_put_buffer(f, s->rx_buffer, MAX_ETH_FRAME_SIZE);
- qemu_put_buffer(f, s->tx_buffer, MAX_ETH_FRAME_SIZE);
+ s->nic = NULL;
}
-static int mipsnet_load(QEMUFile *f, void *opaque, int version_id)
+static NetClientInfo net_mipsnet_info = {
+ .type = NET_CLIENT_OPTIONS_KIND_NIC,
+ .size = sizeof(NICState),
+ .can_receive = mipsnet_can_receive,
+ .receive = mipsnet_receive,
+ .cleanup = mipsnet_cleanup,
+};
+
+static const MemoryRegionOps mipsnet_ioport_ops = {
+ .read = mipsnet_ioport_read,
+ .write = mipsnet_ioport_write,
+ .impl.min_access_size = 1,
+ .impl.max_access_size = 4,
+};
+
+static int mipsnet_sysbus_init(SysBusDevice *dev)
{
- MIPSnetState *s = opaque;
+ MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev, dev);
- if (version_id > 0)
- return -EINVAL;
+ memory_region_init_io(&s->io, &mipsnet_ioport_ops, s, "mipsnet-io", 36);
+ sysbus_init_mmio(dev, &s->io);
+ sysbus_init_irq(dev, &s->irq);
- qemu_get_be32s(f, &s->busy);
- qemu_get_be32s(f, &s->rx_count);
- qemu_get_be32s(f, &s->rx_read);
- qemu_get_be32s(f, &s->tx_count);
- qemu_get_be32s(f, &s->tx_written);
- qemu_get_be32s(f, &s->intctl);
- qemu_get_buffer(f, s->rx_buffer, MAX_ETH_FRAME_SIZE);
- qemu_get_buffer(f, s->tx_buffer, MAX_ETH_FRAME_SIZE);
+ s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf,
+ object_get_typename(OBJECT(dev)), dev->qdev.id, s);
+ qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
return 0;
}
-void mipsnet_init (int base, qemu_irq irq, NICInfo *nd)
+static void mipsnet_sysbus_reset(DeviceState *dev)
{
- MIPSnetState *s;
-
- s = qemu_mallocz(sizeof(MIPSnetState));
- if (!s)
- return;
-
- register_ioport_write(base, 36, 1, mipsnet_ioport_write, s);
- register_ioport_read(base, 36, 1, mipsnet_ioport_read, s);
- register_ioport_write(base, 36, 2, mipsnet_ioport_write, s);
- register_ioport_read(base, 36, 2, mipsnet_ioport_read, s);
- register_ioport_write(base, 36, 4, mipsnet_ioport_write, s);
- register_ioport_read(base, 36, 4, mipsnet_ioport_read, s);
-
- s->irq = irq;
- s->nd = nd;
- if (nd && nd->vlan) {
- s->vc = qemu_new_vlan_client(nd->vlan, mipsnet_receive,
- mipsnet_can_receive, s);
- } else {
- s->vc = NULL;
- }
+ MIPSnetState *s = DO_UPCAST(MIPSnetState, busdev.qdev, dev);
+ mipsnet_reset(s);
+}
- snprintf(s->vc->info_str, sizeof(s->vc->info_str),
- "mipsnet macaddr=%02x:%02x:%02x:%02x:%02x:%02x",
- s->nd->macaddr[0],
- s->nd->macaddr[1],
- s->nd->macaddr[2],
- s->nd->macaddr[3],
- s->nd->macaddr[4],
- s->nd->macaddr[5]);
+static Property mipsnet_properties[] = {
+ DEFINE_NIC_PROPERTIES(MIPSnetState, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
- mipsnet_reset(s);
- register_savevm("mipsnet", 0, 0, mipsnet_save, mipsnet_load, s);
+static void mipsnet_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mipsnet_sysbus_init;
+ dc->desc = "MIPS Simulator network device";
+ dc->reset = mipsnet_sysbus_reset;
+ dc->vmsd = &vmstate_mipsnet;
+ dc->props = mipsnet_properties;
}
+
+static TypeInfo mipsnet_info = {
+ .name = "mipsnet",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(MIPSnetState),
+ .class_init = mipsnet_class_init,
+};
+
+static void mipsnet_register_types(void)
+{
+ type_register_static(&mipsnet_info);
+}
+
+type_init(mipsnet_register_types)
projects / qemu.git / blobdiff