intel_iommu: use access_flags for iotlb

[qemu.git] / disas.c

diff --git a/disas.c b/disas.c
index 71007fb6a19cb2d8e7aac4f91dbeace1acbdbbf2..d335c55bbf5dedf0a97bca047507d66ff8e5eaee 100644 (file)
--- a/disas.c
+++ b/disas.c
@@ -1,15 +1,15 @@
 /* General "disassemble this chunk" code.  Used for debugging. */
 /* General "disassemble this chunk" code.  Used for debugging. */

-#include "config.h"
+#include "qemu/osdep.h"
+#include "qemu-common.h"

 #include "disas/bfd.h"
 #include "elf.h"
 #include "disas/bfd.h"
 #include "elf.h"

-#include <errno.h>

 
 #include "cpu.h"
 #include "disas/disas.h"
 
 typedef struct CPUDebug {
     struct disassemble_info info;
 
 #include "cpu.h"
 #include "disas/disas.h"
 
 typedef struct CPUDebug {
     struct disassemble_info info;

-    CPUArchState *env;
+    CPUState *cpu;

 } CPUDebug;
 
 /* Filled in by elfload.c.  Simplistic, but will do for now. */
 } CPUDebug;
 
 /* Filled in by elfload.c.  Simplistic, but will do for now. */


@@ -39,7 +39,7 @@ target_read_memory (bfd_vma memaddr,
 {
     CPUDebug *s = container_of(info, CPUDebug, info);
 
 {
     CPUDebug *s = container_of(info, CPUDebug, info);
 

-    cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);
+    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);

     return 0;
 }
 
     return 0;
 }
 


@@ -71,14 +71,6 @@ generic_print_address (bfd_vma addr, struct disassemble_info *info)
     (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
 }
 
     (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
 }
 

-/* Print address in hex, truncated to the width of a target virtual address. */
-static void
-generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
-{
-    uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
-    generic_print_address(addr & mask, info);
-}
-

 /* Print address in hex, truncated to the width of a host virtual address. */
 static void
 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
 /* Print address in hex, truncated to the width of a host virtual address. */
 static void
 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)


@@ -150,42 +142,69 @@ bfd_vma bfd_getb16 (const bfd_byte *addr)
   return (bfd_vma) v;
 }
 
   return (bfd_vma) v;
 }
 

-#ifdef TARGET_ARM
-static int
-print_insn_thumb1(bfd_vma pc, disassemble_info *info)
+static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
+                              const char *prefix)
+{
+    int i, n = info->buffer_length;
+    uint8_t *buf = g_malloc(n);
+
+    info->read_memory_func(pc, buf, n, info);
+
+    for (i = 0; i < n; ++i) {
+        if (i % 32 == 0) {
+            info->fprintf_func(info->stream, "\n%s: ", prefix);
+        }
+        info->fprintf_func(info->stream, "%02x", buf[i]);
+    }
+
+    g_free(buf);
+    return n;
+}
+
+static int print_insn_od_host(bfd_vma pc, disassemble_info *info)

 {
 {

-  return print_insn_arm(pc | 1, info);
+    return print_insn_objdump(pc, info, "OBJD-H");
+}
+
+static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
+{
+    return print_insn_objdump(pc, info, "OBJD-T");

 }
 }

-#endif

 
 /* Disassemble this for me please... (debugging). 'flags' has the following
    values:
     i386 - 1 means 16 bit code, 2 means 64 bit code
 
 /* Disassemble this for me please... (debugging). 'flags' has the following
    values:
     i386 - 1 means 16 bit code, 2 means 64 bit code

-    arm  - bit 0 = thumb, bit 1 = reverse endian
-    ppc  - nonzero means little endian
+    ppc  - bits 0:15 specify (optionally) the machine instruction set;
+           bit 16 indicates little endian.

     other targets - unused
  */
     other targets - unused
  */

-void target_disas(FILE *out, CPUArchState *env, target_ulong code,
+void target_disas(FILE *out, CPUState *cpu, target_ulong code,

                   target_ulong size, int flags)
 {
                   target_ulong size, int flags)
 {

+    CPUClass *cc = CPU_GET_CLASS(cpu);

     target_ulong pc;
     int count;
     CPUDebug s;
     target_ulong pc;
     int count;
     CPUDebug s;

-    int (*print_insn)(bfd_vma pc, disassemble_info *info);

 
     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 
 
     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 

-    s.env = env;
+    s.cpu = cpu;

     s.info.read_memory_func = target_read_memory;
     s.info.read_memory_func = target_read_memory;

+    s.info.read_memory_inner_func = NULL;

     s.info.buffer_vma = code;
     s.info.buffer_length = size;
     s.info.buffer_vma = code;
     s.info.buffer_length = size;

-    s.info.print_address_func = generic_print_target_address;
+    s.info.print_address_func = generic_print_address;

 
 #ifdef TARGET_WORDS_BIGENDIAN
     s.info.endian = BFD_ENDIAN_BIG;
 #else
     s.info.endian = BFD_ENDIAN_LITTLE;
 #endif
 
 #ifdef TARGET_WORDS_BIGENDIAN
     s.info.endian = BFD_ENDIAN_BIG;
 #else
     s.info.endian = BFD_ENDIAN_LITTLE;
 #endif

+
+    if (cc->disas_set_info) {
+        cc->disas_set_info(cpu, &s.info);
+    }
+

 #if defined(TARGET_I386)
     if (flags == 2) {
         s.info.mach = bfd_mach_x86_64;
 #if defined(TARGET_I386)
     if (flags == 2) {
         s.info.mach = bfd_mach_x86_64;


@@ -194,31 +213,13 @@ void target_disas(FILE *out, CPUArchState *env, target_ulong code,
     } else {
         s.info.mach = bfd_mach_i386_i386;
     }
     } else {
         s.info.mach = bfd_mach_i386_i386;
     }

-    print_insn = print_insn_i386;
-#elif defined(TARGET_ARM)
-    if (flags & 1) {
-        print_insn = print_insn_thumb1;
-    } else {
-        print_insn = print_insn_arm;
-    }
-    if (flags & 2) {
-#ifdef TARGET_WORDS_BIGENDIAN
-        s.info.endian = BFD_ENDIAN_LITTLE;
-#else
-        s.info.endian = BFD_ENDIAN_BIG;
-#endif
-    }
-#elif defined(TARGET_SPARC)
-    print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
-    s.info.mach = bfd_mach_sparc_v9b;
-#endif
+    s.info.print_insn = print_insn_i386;

 #elif defined(TARGET_PPC)
 #elif defined(TARGET_PPC)

-    if (flags >> 16) {
+    if ((flags >> 16) & 1) {

         s.info.endian = BFD_ENDIAN_LITTLE;
     }
     if (flags & 0xFFFF) {
         s.info.endian = BFD_ENDIAN_LITTLE;
     }
     if (flags & 0xFFFF) {

-        /* If we have a precise definitions of the instructions set, use it */
+        /* If we have a precise definition of the instruction set, use it. */

         s.info.mach = flags & 0xFFFF;
     } else {
 #ifdef TARGET_PPC64
         s.info.mach = flags & 0xFFFF;
     } else {
 #ifdef TARGET_PPC64


@@ -228,50 +229,15 @@ void target_disas(FILE *out, CPUArchState *env, target_ulong code,
 #endif
     }
     s.info.disassembler_options = (char *)"any";
 #endif
     }
     s.info.disassembler_options = (char *)"any";

-    print_insn = print_insn_ppc;
-#elif defined(TARGET_M68K)
-    print_insn = print_insn_m68k;
-#elif defined(TARGET_MIPS)
-#ifdef TARGET_WORDS_BIGENDIAN
-    print_insn = print_insn_big_mips;
-#else
-    print_insn = print_insn_little_mips;
+    s.info.print_insn = print_insn_ppc;

 #endif
 #endif

-#elif defined(TARGET_SH4)
-    s.info.mach = bfd_mach_sh4;
-    print_insn = print_insn_sh;
-#elif defined(TARGET_ALPHA)
-    s.info.mach = bfd_mach_alpha_ev6;
-    print_insn = print_insn_alpha;
-#elif defined(TARGET_CRIS)
-    if (flags != 32) {
-        s.info.mach = bfd_mach_cris_v0_v10;
-        print_insn = print_insn_crisv10;
-    } else {
-        s.info.mach = bfd_mach_cris_v32;
-        print_insn = print_insn_crisv32;
+    if (s.info.print_insn == NULL) {
+        s.info.print_insn = print_insn_od_target;

     }
     }

-#elif defined(TARGET_S390X)
-    s.info.mach = bfd_mach_s390_64;
-    print_insn = print_insn_s390;
-#elif defined(TARGET_MICROBLAZE)
-    s.info.mach = bfd_arch_microblaze;
-    print_insn = print_insn_microblaze;
-#elif defined(TARGET_MOXIE)
-    s.info.mach = bfd_arch_moxie;
-    print_insn = print_insn_moxie;
-#elif defined(TARGET_LM32)
-    s.info.mach = bfd_mach_lm32;
-    print_insn = print_insn_lm32;
-#else
-    fprintf(out, "0x" TARGET_FMT_lx
-           ": Asm output not supported on this arch\n", code);
-    return;
-#endif

 
     for (pc = code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
 
     for (pc = code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);

-       count = print_insn(pc, &s.info);
+       count = s.info.print_insn(pc, &s.info);

 #if 0
         {
             int i;
 #if 0
         {
             int i;


@@ -303,7 +269,7 @@ void disas(FILE *out, void *code, unsigned long size)
     uintptr_t pc;
     int count;
     CPUDebug s;
     uintptr_t pc;
     int count;
     CPUDebug s;

-    int (*print_insn)(bfd_vma pc, disassemble_info *info);
+    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;

 
     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
     s.info.print_address_func = generic_print_host_address;
 
     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
     s.info.print_address_func = generic_print_host_address;


@@ -328,6 +294,8 @@ void disas(FILE *out, void *code, unsigned long size)
 #elif defined(_ARCH_PPC)
     s.info.disassembler_options = (char *)"any";
     print_insn = print_insn_ppc;
 #elif defined(_ARCH_PPC)
     s.info.disassembler_options = (char *)"any";
     print_insn = print_insn_ppc;

+#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
+    print_insn = print_insn_arm_a64;

 #elif defined(__alpha__)
     print_insn = print_insn_alpha;
 #elif defined(__sparc__)
 #elif defined(__alpha__)
     print_insn = print_insn_alpha;
 #elif defined(__sparc__)


@@ -347,11 +315,10 @@ void disas(FILE *out, void *code, unsigned long size)
     print_insn = print_insn_hppa;
 #elif defined(__ia64__)
     print_insn = print_insn_ia64;
     print_insn = print_insn_hppa;
 #elif defined(__ia64__)
     print_insn = print_insn_ia64;

-#else
-    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
-           (long) code);
-    return;

 #endif
 #endif

+    if (print_insn == NULL) {
+        print_insn = print_insn_od_host;
+    }

     for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
         fprintf(out, "0x%08" PRIxPTR ":  ", pc);
         count = print_insn(pc, &s.info);
     for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
         fprintf(out, "0x%08" PRIxPTR ":  ", pc);
         count = print_insn(pc, &s.info);


@@ -392,34 +359,26 @@ monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
     if (monitor_disas_is_physical) {
         cpu_physical_memory_read(memaddr, myaddr, length);
     } else {
     if (monitor_disas_is_physical) {
         cpu_physical_memory_read(memaddr, myaddr, length);
     } else {

-        cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);
+        cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);

     }
     return 0;
 }
 
     }
     return 0;
 }
 

-static int GCC_FMT_ATTR(2, 3)
-monitor_fprintf(FILE *stream, const char *fmt, ...)
-{
-    va_list ap;
-    va_start(ap, fmt);
-    monitor_vprintf((Monitor *)stream, fmt, ap);
-    va_end(ap);
-    return 0;
-}
-
-void monitor_disas(Monitor *mon, CPUArchState *env,
+/* Disassembler for the monitor.
+   See target_disas for a description of flags. */
+void monitor_disas(Monitor *mon, CPUState *cpu,

                    target_ulong pc, int nb_insn, int is_physical, int flags)
 {
                    target_ulong pc, int nb_insn, int is_physical, int flags)
 {

+    CPUClass *cc = CPU_GET_CLASS(cpu);

     int count, i;
     CPUDebug s;
     int count, i;
     CPUDebug s;

-    int (*print_insn)(bfd_vma pc, disassemble_info *info);

 
     INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 
 
     INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 

-    s.env = env;
+    s.cpu = cpu;

     monitor_disas_is_physical = is_physical;
     s.info.read_memory_func = monitor_read_memory;
     monitor_disas_is_physical = is_physical;
     s.info.read_memory_func = monitor_read_memory;

-    s.info.print_address_func = generic_print_target_address;
+    s.info.print_address_func = generic_print_address;

 
     s.info.buffer_vma = pc;
 
 
     s.info.buffer_vma = pc;
 


@@ -428,6 +387,11 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
 #else
     s.info.endian = BFD_ENDIAN_LITTLE;
 #endif
 #else
     s.info.endian = BFD_ENDIAN_LITTLE;
 #endif

+
+    if (cc->disas_set_info) {
+        cc->disas_set_info(cpu, &s.info);
+    }
+

 #if defined(TARGET_I386)
     if (flags == 2) {
         s.info.mach = bfd_mach_x86_64;
 #if defined(TARGET_I386)
     if (flags == 2) {
         s.info.mach = bfd_mach_x86_64;


@@ -436,52 +400,32 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
     } else {
         s.info.mach = bfd_mach_i386_i386;
     }
     } else {
         s.info.mach = bfd_mach_i386_i386;
     }

-    print_insn = print_insn_i386;
-#elif defined(TARGET_ARM)
-    print_insn = print_insn_arm;
-#elif defined(TARGET_ALPHA)
-    print_insn = print_insn_alpha;
-#elif defined(TARGET_SPARC)
-    print_insn = print_insn_sparc;
-#ifdef TARGET_SPARC64
-    s.info.mach = bfd_mach_sparc_v9b;
-#endif
+    s.info.print_insn = print_insn_i386;

 #elif defined(TARGET_PPC)
 #elif defined(TARGET_PPC)

+    if (flags & 0xFFFF) {
+        /* If we have a precise definition of the instruction set, use it. */
+        s.info.mach = flags & 0xFFFF;
+    } else {

 #ifdef TARGET_PPC64
 #ifdef TARGET_PPC64

-    s.info.mach = bfd_mach_ppc64;
-#else
-    s.info.mach = bfd_mach_ppc;
-#endif
-    print_insn = print_insn_ppc;
-#elif defined(TARGET_M68K)
-    print_insn = print_insn_m68k;
-#elif defined(TARGET_MIPS)
-#ifdef TARGET_WORDS_BIGENDIAN
-    print_insn = print_insn_big_mips;
+        s.info.mach = bfd_mach_ppc64;

 #else
 #else

-    print_insn = print_insn_little_mips;
+        s.info.mach = bfd_mach_ppc;

 #endif
 #endif

-#elif defined(TARGET_SH4)
-    s.info.mach = bfd_mach_sh4;
-    print_insn = print_insn_sh;
-#elif defined(TARGET_S390X)
-    s.info.mach = bfd_mach_s390_64;
-    print_insn = print_insn_s390;
-#elif defined(TARGET_MOXIE)
-    s.info.mach = bfd_arch_moxie;
-    print_insn = print_insn_moxie;
-#elif defined(TARGET_LM32)
-    s.info.mach = bfd_mach_lm32;
-    print_insn = print_insn_lm32;
-#else
-    monitor_printf(mon, "0x" TARGET_FMT_lx
-                   ": Asm output not supported on this arch\n", pc);
-    return;
+    }
+    if ((flags >> 16) & 1) {
+        s.info.endian = BFD_ENDIAN_LITTLE;
+    }
+    s.info.print_insn = print_insn_ppc;

 #endif
 #endif

+    if (!s.info.print_insn) {
+        monitor_printf(mon, "0x" TARGET_FMT_lx
+                       ": Asm output not supported on this arch\n", pc);
+        return;
+    }

 
     for(i = 0; i < nb_insn; i++) {
        monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
 
     for(i = 0; i < nb_insn; i++) {
        monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);

-        count = print_insn(pc, &s.info);
+        count = s.info.print_insn(pc, &s.info);

        monitor_printf(mon, "\n");
        if (count < 0)
            break;
        monitor_printf(mon, "\n");
        if (count < 0)
            break;