uint32_t address, int len);
void pci_default_write_config(PCIDevice *d,
uint32_t address, uint32_t val, int len);
+void generic_pci_save(QEMUFile* f, void *opaque);
+int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
extern struct PIIX3State *piix3_state;
unsigned long vga_ram_offset, int vga_ram_size);
/* sdl.c */
-void sdl_display_init(DisplayState *ds);
+void sdl_display_init(DisplayState *ds, int full_screen);
/* ide.c */
#define MAX_DISKS 4
const char *initrd_filename);
/* iommu.c */
-void iommu_init();
+void iommu_init(uint32_t addr);
uint32_t iommu_translate(uint32_t addr);
/* lance.c */
-void lance_init(NetDriverState *nd, int irq);
+void lance_init(NetDriverState *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
/* tcx.c */
-void tcx_init(DisplayState *ds);
+void tcx_init(DisplayState *ds, uint32_t addr);
/* sched.c */
void sched_init();
/* magic-load.c */
-void magic_init(const char *kfn, int kloadaddr);
+void magic_init(const char *kfn, int kloadaddr, uint32_t addr);
+
+/* timer.c */
+void timer_init(uint32_t addr, int irq);
/* NVRAM helpers */
#include "hw/m48t59.h"