hw/arm/virt: Wire up secure timer interrupt

[qemu.git] / target-openrisc / mmu_helper.c

diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index 7c28079ddb5d60e2a08172ad8668b9658b91ff16..ee1c6f61184f561637b2a6b9a053378f7d78a0a1 100644 (file)
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -19,25 +19,24 @@
  */
 
 #include "cpu.h"
+#include "exec/cpu_ldst.h"
 
 #ifndef CONFIG_USER_ONLY
-#include "softmmu_exec.h"
-#define MMUSUFFIX _mmu
 
-#define SHIFT 0
-#include "softmmu_template.h"
-
-#define SHIFT 1
-#include "softmmu_template.h"
-
-#define SHIFT 2
-#include "softmmu_template.h"
-
-#define SHIFT 3
-#include "softmmu_template.h"
-
-void tlb_fill(CPUOpenRISCState *env, target_ulong addr, int is_write,
+void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
               int mmu_idx, uintptr_t retaddr)
 {
+    int ret;
+
+    ret = openrisc_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
+
+    if (ret) {
+        if (retaddr) {
+            /* now we have a real cpu fault.  */
+            cpu_restore_state(cs, retaddr);
+        }
+        /* Raise Exception.  */
+        cpu_loop_exit(cs);
+    }
 }
 #endif