linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode

[qemu.git] / target-cris / cpu.h

diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index b88c14751863e02af1d190c70c8b3e9e1d89f4d4..415cf91436f6ca024cf3a03eaa364978b925b922 100644 (file)
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -20,7 +20,6 @@
 #ifndef CPU_CRIS_H
 #define CPU_CRIS_H
 
-#include "config.h"
 #include "qemu-common.h"
 
 #define TARGET_LONG_BITS 32
@@ -29,10 +28,6 @@
 
 #include "exec/cpu-defs.h"
 
-#define TARGET_HAS_ICE 1
-
-#define ELF_MACHINE    EM_CRIS
-
 #define EXCP_NMI        1
 #define EXCP_GURU       2
 #define EXCP_BUSFAULT   3
@@ -110,6 +105,11 @@
 
 #define NB_MMU_MODES 2
 
+typedef struct {
+    uint32_t hi;
+    uint32_t lo;
+} TLBSet;
+
 typedef struct CPUCRISState {
        uint32_t regs[16];
        /* P0 - P15 are referred to as special registers in the docs.  */
@@ -153,7 +153,7 @@ typedef struct CPUCRISState {
        uint32_t sregs[4][16];
 
        /* Linear feedback shift reg in the mmu. Used to provide pseudo
-          randomness for the 'hint' the mmu gives to sw for chosing valid
+          randomness for the 'hint' the mmu gives to sw for choosing valid
           sets on TLB refills.  */
        uint32_t mmu_rand_lfsr;
 
@@ -163,11 +163,7 @@ typedef struct CPUCRISState {
         *
         * One for I and another for D.
         */
-       struct
-       {
-               uint32_t hi;
-               uint32_t lo;
-       } tlbsets[2][4][16];
+        TLBSet tlbsets[2][4][16];
 
        CPU_COMMON
 
@@ -178,7 +174,7 @@ typedef struct CPUCRISState {
 #include "cpu-qom.h"
 
 CRISCPU *cpu_cris_init(const char *cpu_model);
-int cpu_cris_exec(CPUCRISState *s);
+int cpu_cris_exec(CPUState *cpu);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
    signal handlers to inform the virtual CPU of exceptions. non zero
    is returned if the signal was handled by the virtual CPU.  */
@@ -223,26 +219,16 @@ enum {
 #define TARGET_PHYS_ADDR_SPACE_BITS 32
 #define TARGET_VIRT_ADDR_SPACE_BITS 32
 
-static inline CPUCRISState *cpu_init(const char *cpu_model)
-{
-    CRISCPU *cpu = cpu_cris_init(cpu_model);
-    if (cpu == NULL) {
-        return NULL;
-    }
-    return &cpu->env;
-}
+#define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
 
 #define cpu_exec cpu_cris_exec
-#define cpu_gen_code cpu_cris_gen_code
 #define cpu_signal_handler cpu_cris_signal_handler
 
-#define CPU_SAVE_VERSION 1
-
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
-static inline int cpu_mmu_index (CPUCRISState *env)
+static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch)
 {
        return !!(env->pregs[PR_CCS] & U_FLAG);
 }