#include "boards.h"
#include "flash.h"
#include "qemu-log.h"
-
-#ifdef TARGET_WORDS_BIGENDIAN
-#define BIOS_FILENAME "mips_bios.bin"
-#else
-#define BIOS_FILENAME "mipsel_bios.bin"
-#endif
+#include "mips-bios.h"
#define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
int64_t entry, kernel_low, kernel_high;
long kernel_size, initrd_size;
ram_addr_t initrd_offset;
+ int ret;
kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
(uint64_t *)&entry, (uint64_t *)&kernel_low,
/* Store command line. */
if (initrd_size > 0) {
- int ret;
- ret = sprintf((char *)(phys_ram_base + (16 << 20) - 256),
- "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
- PHYS_TO_VIRT((uint32_t)initrd_offset),
- initrd_size);
- strcpy ((char *)(phys_ram_base + (16 << 20) - 256 + ret),
- loaderparams.kernel_cmdline);
- }
- else {
- strcpy ((char *)(phys_ram_base + (16 << 20) - 256),
- loaderparams.kernel_cmdline);
+ char buf[64];
+ ret = snprintf(buf, 64, "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
+ PHYS_TO_VIRT((uint32_t)initrd_offset),
+ initrd_size);
+ cpu_physical_memory_write((16 << 20) - 256, (void *)buf, 64);
+ } else {
+ ret = 0;
}
+ pstrcpy_targphys((16 << 20) - 256 + ret, 256,
+ loaderparams.kernel_cmdline);
- *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
- *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
+ stl_phys((16 << 20) - 260, 0x12345678);
+ stl_phys((16 << 20) - 264, ram_size);
}
static void main_cpu_reset(void *opaque)
static const int sector_len = 32 * 1024;
static
-void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
+void mips_r4k_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- char buf[1024];
+ char *filename;
ram_addr_t ram_offset;
- ram_addr_t vga_ram_offset;
ram_addr_t bios_offset;
int bios_size;
CPUState *env;
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- qemu_register_reset(main_cpu_reset, env);
+ qemu_register_reset(main_cpu_reset, 0, env);
/* allocate RAM */
if (ram_size > (256 << 20)) {
exit(1);
}
ram_offset = qemu_ram_alloc(ram_size);
- vga_ram_offset = qemu_ram_alloc(vga_ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
run. */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
- bios_size = get_image_size(buf);
+ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+ if (filename) {
+ bios_size = get_image_size(filename);
+ } else {
+ bios_size = -1;
+ }
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
bios_offset = qemu_ram_alloc(BIOS_SIZE);
cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
bios_offset | IO_MEM_ROM);
- load_image_targphys(buf, 0x1fc00000, BIOS_SIZE);
+ load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
} else if ((index = drive_get_index(IF_PFLASH, 0, 0)) > -1) {
uint32_t mips_rom = 0x00400000;
bios_offset = qemu_ram_alloc(mips_rom);
else {
/* not fatal */
fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
- buf);
+ bios_name);
+ }
+ if (filename) {
+ qemu_free(filename);
}
if (kernel_filename) {
}
}
- isa_vga_init(phys_ram_base + vga_ram_offset, ram_size,
- vga_ram_size);
+ isa_vga_init();
if (nd_table[0].vlan)
isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
i8042_init(i8259[1], i8259[12], 0x60);
}
-QEMUMachine mips_machine = {
+static QEMUMachine mips_machine = {
.name = "mips",
.desc = "mips r4k platform",
.init = mips_r4k_init,
- .ram_require = VGA_RAM_SIZE + BIOS_SIZE,
};
+
+static void mips_machine_init(void)
+{
+ qemu_register_machine(&mips_machine);
+}
+
+machine_init(mips_machine_init);