*/
#include <math.h>
-#include "exec.h"
-#include "exec-all.h"
+#include "cpu.h"
+#include "dyngen-exec.h"
#include "host-utils.h"
#include "ioport.h"
+#include "qemu-common.h"
+#include "qemu-log.h"
+#include "cpu-defs.h"
+#include "helper.h"
-//#define DEBUG_PCALL
+#if !defined(CONFIG_USER_ONLY)
+#include "softmmu_exec.h"
+#endif /* !defined(CONFIG_USER_ONLY) */
+//#define DEBUG_PCALL
#ifdef DEBUG_PCALL
# define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__)
# define LOG_PCALL_STATE(env) do { } while (0)
#endif
+/* n must be a constant to be efficient */
+static inline target_long lshift(target_long x, int n)
+{
+ if (n >= 0) {
+ return x << n;
+ } else {
+ return x >> (-n);
+ }
+}
+
+#define RC_MASK 0xc00
+#define RC_NEAR 0x000
+#define RC_DOWN 0x400
+#define RC_UP 0x800
+#define RC_CHOP 0xc00
+
+#define MAXTAN 9223372036854775808.0
+
+/* the following deal with x86 long double-precision numbers */
+#define MAXEXPD 0x7fff
+#define EXPBIAS 16383
+#define EXPD(fp) (fp.l.upper & 0x7fff)
+#define SIGND(fp) ((fp.l.upper) & 0x8000)
+#define MANTD(fp) (fp.l.lower)
+#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
+
+static inline void fpush(void)
+{
+ env->fpstt = (env->fpstt - 1) & 7;
+ env->fptags[env->fpstt] = 0; /* validate stack entry */
+}
+
+static inline void fpop(void)
+{
+ env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
+ env->fpstt = (env->fpstt + 1) & 7;
+}
+
+static inline floatx80 helper_fldt(target_ulong ptr)
+{
+ CPU_LDoubleU temp;
+
+ temp.l.lower = ldq(ptr);
+ temp.l.upper = lduw(ptr + 8);
+ return temp.d;
+}
+
+static inline void helper_fstt(floatx80 f, target_ulong ptr)
+{
+ CPU_LDoubleU temp;
+
+ temp.d = f;
+ stq(ptr, temp.l.lower);
+ stw(ptr + 8, temp.l.upper);
+}
+
+#define FPUS_IE (1 << 0)
+#define FPUS_DE (1 << 1)
+#define FPUS_ZE (1 << 2)
+#define FPUS_OE (1 << 3)
+#define FPUS_UE (1 << 4)
+#define FPUS_PE (1 << 5)
+#define FPUS_SF (1 << 6)
+#define FPUS_SE (1 << 7)
+#define FPUS_B (1 << 15)
+
+#define FPUC_EM 0x3f
+
+static inline uint32_t compute_eflags(void)
+{
+ return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
+}
+
+/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
+static inline void load_eflags(int eflags, int update_mask)
+{
+ CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
+ DF = 1 - (2 * ((eflags >> 10) & 1));
+ env->eflags = (env->eflags & ~update_mask) |
+ (eflags & update_mask) | 0x2;
+}
+
+/* load efer and update the corresponding hflags. XXX: do consistency
+ checks with cpuid bits ? */
+static inline void cpu_load_efer(CPUState *env, uint64_t val)
+{
+ env->efer = val;
+ env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
+ if (env->efer & MSR_EFER_LMA) {
+ env->hflags |= HF_LMA_MASK;
+ }
+ if (env->efer & MSR_EFER_SVME) {
+ env->hflags |= HF_SVME_MASK;
+ }
+}
#if 0
#define raise_exception_err(a, b)\
} while (0)
#endif
+static void QEMU_NORETURN raise_exception_err(int exception_index,
+ int error_code);
+
static const uint8_t parity_table[256] = {
CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
6, 7, 8, 0, 1, 2, 3, 4,
};
-#if defined(CONFIG_SOFTFLOAT)
-# define floatx_lg2 make_floatx80( 0x3ffd, 0x9a209a84fbcff799LL )
-# define floatx_l2e make_floatx80( 0x3fff, 0xb8aa3b295c17f0bcLL )
-# define floatx_l2t make_floatx80( 0x4000, 0xd49a784bcd1b8afeLL )
-#else
-# define floatx_lg2 (0.30102999566398119523L)
-# define floatx_l2e (1.44269504088896340739L)
-# define floatx_l2t (3.32192809488736234781L)
-#endif
-
-static const CPU86_LDouble f15rk[7] =
-{
- floatx_zero,
- floatx_one,
- floatx_pi,
- floatx_lg2,
- floatx_ln2,
- floatx_l2e,
- floatx_l2t,
-};
+#define floatx80_lg2 make_floatx80( 0x3ffd, 0x9a209a84fbcff799LL )
+#define floatx80_l2e make_floatx80( 0x3fff, 0xb8aa3b295c17f0bcLL )
+#define floatx80_l2t make_floatx80( 0x4000, 0xd49a784bcd1b8afeLL )
/* broken thread support */
{
env->exception_index = EXCP_SYSCALL;
env->exception_next_eip = env->eip + next_eip_addend;
- cpu_loop_exit();
+ cpu_loop_exit(env);
}
#else
void helper_syscall(int next_eip_addend)
env->eflags &= ~(IF_MASK | TF_MASK | AC_MASK | RF_MASK);
}
+#if defined(CONFIG_USER_ONLY)
/* fake user mode interrupt */
-void do_interrupt_user(int intno, int is_int, int error_code,
- target_ulong next_eip)
+static void do_interrupt_user(int intno, int is_int, int error_code,
+ target_ulong next_eip)
{
SegmentCache *dt;
target_ulong ptr;
EIP = next_eip;
}
-#if !defined(CONFIG_USER_ONLY)
+#else
+
static void handle_even_inj(int intno, int is_int, int error_code,
int is_hw, int rm)
{
* the int instruction. next_eip is the EIP value AFTER the interrupt
* instruction. It is only relevant if is_int is TRUE.
*/
-void do_interrupt(int intno, int is_int, int error_code,
- target_ulong next_eip, int is_hw)
+static void do_interrupt_all(int intno, int is_int, int error_code,
+ target_ulong next_eip, int is_hw)
{
if (qemu_loglevel_mask(CPU_LOG_INT)) {
if ((env->cr[0] & CR0_PE_MASK)) {
#endif
}
+void do_interrupt(CPUState *env1)
+{
+ CPUState *saved_env;
+
+ saved_env = env;
+ env = env1;
+#if defined(CONFIG_USER_ONLY)
+ /* if user mode only, we simulate a fake exception
+ which will be handled outside the cpu execution
+ loop */
+ do_interrupt_user(env->exception_index,
+ env->exception_is_int,
+ env->error_code,
+ env->exception_next_eip);
+ /* successfully delivered */
+ env->old_exception = -1;
+#else
+ /* simulate a real cpu exception. On i386, it can
+ trigger new exceptions, but we do not handle
+ double or triple faults yet. */
+ do_interrupt_all(env->exception_index,
+ env->exception_is_int,
+ env->error_code,
+ env->exception_next_eip, 0);
+ /* successfully delivered */
+ env->old_exception = -1;
+#endif
+ env = saved_env;
+}
+
+void do_interrupt_x86_hardirq(CPUState *env1, int intno, int is_hw)
+{
+ CPUState *saved_env;
+
+ saved_env = env;
+ env = env1;
+ do_interrupt_all(intno, 0, 0, 0, is_hw);
+ env = saved_env;
+}
+
/* This should come from sysemu.h - if we could include it here... */
void qemu_system_reset_request(void);
env->error_code = error_code;
env->exception_is_int = is_int;
env->exception_next_eip = env->eip + next_eip_addend;
- cpu_loop_exit();
+ cpu_loop_exit(env);
}
/* shortcuts to generate exceptions */
-void raise_exception_err(int exception_index, int error_code)
+static void QEMU_NORETURN raise_exception_err(int exception_index,
+ int error_code)
+{
+ raise_interrupt(exception_index, 0, error_code, 0);
+}
+
+void raise_exception_err_env(CPUState *nenv, int exception_index,
+ int error_code)
{
+ env = nenv;
raise_interrupt(exception_index, 0, error_code, 0);
}
-void raise_exception(int exception_index)
+static void QEMU_NORETURN raise_exception(int exception_index)
{
raise_interrupt(exception_index, 0, 0, 0);
}
#if defined(CONFIG_USER_ONLY)
-void do_smm_enter(void)
+void do_smm_enter(CPUState *env1)
{
}
#define SMM_REVISION_ID 0x00020000
#endif
-void do_smm_enter(void)
+void do_smm_enter(CPUState *env1)
{
target_ulong sm_state;
SegmentCache *dt;
int i, offset;
+ CPUState *saved_env;
+
+ saved_env = env;
+ env = env1;
qemu_log_mask(CPU_LOG_INT, "SMM: enter\n");
log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
cpu_x86_update_cr4(env, 0);
env->dr[7] = 0x00000400;
CC_OP = CC_OP_EFLAGS;
+ env = saved_env;
}
void helper_rsm(void)
void helper_daa(void)
{
- int al, af, cf;
+ int old_al, al, af, cf;
int eflags;
eflags = helper_cc_compute_all(CC_OP);
cf = eflags & CC_C;
af = eflags & CC_A;
- al = EAX & 0xff;
+ old_al = al = EAX & 0xff;
eflags = 0;
if (((al & 0x0f) > 9 ) || af) {
al = (al + 6) & 0xff;
eflags |= CC_A;
}
- if ((al > 0x9f) || cf) {
+ if ((old_al > 0x99) || cf) {
al = (al + 0x60) & 0xff;
eflags |= CC_C;
}
case MSR_TSC_AUX:
env->tsc_aux = val;
break;
+ case MSR_IA32_MISC_ENABLE:
+ env->msr_ia32_misc_enable = val;
+ break;
default:
if ((uint32_t)ECX >= MSR_MC0_CTL
&& (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) {
case MSR_MCG_STATUS:
val = env->mcg_status;
break;
+ case MSR_IA32_MISC_ENABLE:
+ val = env->msr_ia32_misc_enable;
+ break;
default:
if ((uint32_t)ECX >= MSR_MC0_CTL
&& (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) {
/* x87 FPU helpers */
-static inline double CPU86_LDouble_to_double(CPU86_LDouble a)
+static inline double floatx80_to_double(floatx80 a)
{
union {
float64 f64;
double d;
} u;
- u.f64 = floatx_to_float64(a, &env->fp_status);
+ u.f64 = floatx80_to_float64(a, &env->fp_status);
return u.d;
}
-static inline CPU86_LDouble double_to_CPU86_LDouble(double a)
+static inline floatx80 double_to_floatx80(double a)
{
union {
float64 f64;
} u;
u.d = a;
- return float64_to_floatx(u.f64, &env->fp_status);
+ return float64_to_floatx80(u.f64, &env->fp_status);
}
static void fpu_set_exception(int mask)
env->fpus |= FPUS_SE | FPUS_B;
}
-static inline CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b)
+static inline floatx80 helper_fdiv(floatx80 a, floatx80 b)
{
- if (floatx_is_zero(b)) {
+ if (floatx80_is_zero(b)) {
fpu_set_exception(FPUS_ZE);
}
- return floatx_div(a, b, &env->fp_status);
+ return floatx80_div(a, b, &env->fp_status);
}
static void fpu_raise_exception(void)
uint32_t i;
} u;
u.i = val;
- FT0 = float32_to_floatx(u.f, &env->fp_status);
+ FT0 = float32_to_floatx80(u.f, &env->fp_status);
}
void helper_fldl_FT0(uint64_t val)
uint64_t i;
} u;
u.i = val;
- FT0 = float64_to_floatx(u.f, &env->fp_status);
+ FT0 = float64_to_floatx80(u.f, &env->fp_status);
}
void helper_fildl_FT0(int32_t val)
{
- FT0 = int32_to_floatx(val, &env->fp_status);
+ FT0 = int32_to_floatx80(val, &env->fp_status);
}
void helper_flds_ST0(uint32_t val)
} u;
new_fpstt = (env->fpstt - 1) & 7;
u.i = val;
- env->fpregs[new_fpstt].d = float32_to_floatx(u.f, &env->fp_status);
+ env->fpregs[new_fpstt].d = float32_to_floatx80(u.f, &env->fp_status);
env->fpstt = new_fpstt;
env->fptags[new_fpstt] = 0; /* validate stack entry */
}
} u;
new_fpstt = (env->fpstt - 1) & 7;
u.i = val;
- env->fpregs[new_fpstt].d = float64_to_floatx(u.f, &env->fp_status);
+ env->fpregs[new_fpstt].d = float64_to_floatx80(u.f, &env->fp_status);
env->fpstt = new_fpstt;
env->fptags[new_fpstt] = 0; /* validate stack entry */
}
{
int new_fpstt;
new_fpstt = (env->fpstt - 1) & 7;
- env->fpregs[new_fpstt].d = int32_to_floatx(val, &env->fp_status);
+ env->fpregs[new_fpstt].d = int32_to_floatx80(val, &env->fp_status);
env->fpstt = new_fpstt;
env->fptags[new_fpstt] = 0; /* validate stack entry */
}
{
int new_fpstt;
new_fpstt = (env->fpstt - 1) & 7;
- env->fpregs[new_fpstt].d = int64_to_floatx(val, &env->fp_status);
+ env->fpregs[new_fpstt].d = int64_to_floatx80(val, &env->fp_status);
env->fpstt = new_fpstt;
env->fptags[new_fpstt] = 0; /* validate stack entry */
}
float32 f;
uint32_t i;
} u;
- u.f = floatx_to_float32(ST0, &env->fp_status);
+ u.f = floatx80_to_float32(ST0, &env->fp_status);
return u.i;
}
float64 f;
uint64_t i;
} u;
- u.f = floatx_to_float64(ST0, &env->fp_status);
+ u.f = floatx80_to_float64(ST0, &env->fp_status);
return u.i;
}
int32_t helper_fist_ST0(void)
{
int32_t val;
- val = floatx_to_int32(ST0, &env->fp_status);
+ val = floatx80_to_int32(ST0, &env->fp_status);
if (val != (int16_t)val)
val = -32768;
return val;
int32_t helper_fistl_ST0(void)
{
int32_t val;
- val = floatx_to_int32(ST0, &env->fp_status);
+ val = floatx80_to_int32(ST0, &env->fp_status);
return val;
}
int64_t helper_fistll_ST0(void)
{
int64_t val;
- val = floatx_to_int64(ST0, &env->fp_status);
+ val = floatx80_to_int64(ST0, &env->fp_status);
return val;
}
int32_t helper_fistt_ST0(void)
{
int32_t val;
- val = floatx_to_int32_round_to_zero(ST0, &env->fp_status);
+ val = floatx80_to_int32_round_to_zero(ST0, &env->fp_status);
if (val != (int16_t)val)
val = -32768;
return val;
int32_t helper_fisttl_ST0(void)
{
int32_t val;
- val = floatx_to_int32_round_to_zero(ST0, &env->fp_status);
+ val = floatx80_to_int32_round_to_zero(ST0, &env->fp_status);
return val;
}
int64_t helper_fisttll_ST0(void)
{
int64_t val;
- val = floatx_to_int64_round_to_zero(ST0, &env->fp_status);
+ val = floatx80_to_int64_round_to_zero(ST0, &env->fp_status);
return val;
}
void helper_fxchg_ST0_STN(int st_index)
{
- CPU86_LDouble tmp;
+ floatx80 tmp;
tmp = ST(st_index);
ST(st_index) = ST0;
ST0 = tmp;
{
int ret;
- ret = floatx_compare(ST0, FT0, &env->fp_status);
+ ret = floatx80_compare(ST0, FT0, &env->fp_status);
env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
}
{
int ret;
- ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
+ ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
}
int eflags;
int ret;
- ret = floatx_compare(ST0, FT0, &env->fp_status);
+ ret = floatx80_compare(ST0, FT0, &env->fp_status);
eflags = helper_cc_compute_all(CC_OP);
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
int eflags;
int ret;
- ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
+ ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
eflags = helper_cc_compute_all(CC_OP);
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
void helper_fadd_ST0_FT0(void)
{
- ST0 = floatx_add(ST0, FT0, &env->fp_status);
+ ST0 = floatx80_add(ST0, FT0, &env->fp_status);
}
void helper_fmul_ST0_FT0(void)
{
- ST0 = floatx_mul(ST0, FT0, &env->fp_status);
+ ST0 = floatx80_mul(ST0, FT0, &env->fp_status);
}
void helper_fsub_ST0_FT0(void)
{
- ST0 = floatx_sub(ST0, FT0, &env->fp_status);
+ ST0 = floatx80_sub(ST0, FT0, &env->fp_status);
}
void helper_fsubr_ST0_FT0(void)
{
- ST0 = floatx_sub(FT0, ST0, &env->fp_status);
+ ST0 = floatx80_sub(FT0, ST0, &env->fp_status);
}
void helper_fdiv_ST0_FT0(void)
void helper_fadd_STN_ST0(int st_index)
{
- ST(st_index) = floatx_add(ST(st_index), ST0, &env->fp_status);
+ ST(st_index) = floatx80_add(ST(st_index), ST0, &env->fp_status);
}
void helper_fmul_STN_ST0(int st_index)
{
- ST(st_index) = floatx_mul(ST(st_index), ST0, &env->fp_status);
+ ST(st_index) = floatx80_mul(ST(st_index), ST0, &env->fp_status);
}
void helper_fsub_STN_ST0(int st_index)
{
- ST(st_index) = floatx_sub(ST(st_index), ST0, &env->fp_status);
+ ST(st_index) = floatx80_sub(ST(st_index), ST0, &env->fp_status);
}
void helper_fsubr_STN_ST0(int st_index)
{
- ST(st_index) = floatx_sub(ST0, ST(st_index), &env->fp_status);
+ ST(st_index) = floatx80_sub(ST0, ST(st_index), &env->fp_status);
}
void helper_fdiv_STN_ST0(int st_index)
{
- CPU86_LDouble *p;
+ floatx80 *p;
p = &ST(st_index);
*p = helper_fdiv(*p, ST0);
}
void helper_fdivr_STN_ST0(int st_index)
{
- CPU86_LDouble *p;
+ floatx80 *p;
p = &ST(st_index);
*p = helper_fdiv(ST0, *p);
}
/* misc FPU operations */
void helper_fchs_ST0(void)
{
- ST0 = floatx_chs(ST0);
+ ST0 = floatx80_chs(ST0);
}
void helper_fabs_ST0(void)
{
- ST0 = floatx_abs(ST0);
+ ST0 = floatx80_abs(ST0);
}
void helper_fld1_ST0(void)
{
- ST0 = f15rk[1];
+ ST0 = floatx80_one;
}
void helper_fldl2t_ST0(void)
{
- ST0 = f15rk[6];
+ ST0 = floatx80_l2t;
}
void helper_fldl2e_ST0(void)
{
- ST0 = f15rk[5];
+ ST0 = floatx80_l2e;
}
void helper_fldpi_ST0(void)
{
- ST0 = f15rk[2];
+ ST0 = floatx80_pi;
}
void helper_fldlg2_ST0(void)
{
- ST0 = f15rk[3];
+ ST0 = floatx80_lg2;
}
void helper_fldln2_ST0(void)
{
- ST0 = f15rk[4];
+ ST0 = floatx80_ln2;
}
void helper_fldz_ST0(void)
{
- ST0 = f15rk[0];
+ ST0 = floatx80_zero;
}
void helper_fldz_FT0(void)
{
- FT0 = f15rk[0];
+ FT0 = floatx80_zero;
}
uint32_t helper_fnstsw(void)
break;
}
set_float_rounding_mode(rnd_type, &env->fp_status);
-#ifdef FLOATX80
switch((env->fpuc >> 8) & 3) {
case 0:
rnd_type = 32;
break;
}
set_floatx80_rounding_precision(rnd_type, &env->fp_status);
-#endif
}
void helper_fldcw(uint32_t val)
void helper_fbld_ST0(target_ulong ptr)
{
- CPU86_LDouble tmp;
+ floatx80 tmp;
uint64_t val;
unsigned int v;
int i;
v = ldub(ptr + i);
val = (val * 100) + ((v >> 4) * 10) + (v & 0xf);
}
- tmp = int64_to_floatx(val, &env->fp_status);
+ tmp = int64_to_floatx80(val, &env->fp_status);
if (ldub(ptr + 9) & 0x80) {
- floatx_chs(tmp);
+ floatx80_chs(tmp);
}
fpush();
ST0 = tmp;
target_ulong mem_ref, mem_end;
int64_t val;
- val = floatx_to_int64(ST0, &env->fp_status);
+ val = floatx80_to_int64(ST0, &env->fp_status);
mem_ref = ptr;
mem_end = mem_ref + 9;
if (val < 0) {
void helper_f2xm1(void)
{
- double val = CPU86_LDouble_to_double(ST0);
+ double val = floatx80_to_double(ST0);
val = pow(2.0, val) - 1.0;
- ST0 = double_to_CPU86_LDouble(val);
+ ST0 = double_to_floatx80(val);
}
void helper_fyl2x(void)
{
- double fptemp = CPU86_LDouble_to_double(ST0);
+ double fptemp = floatx80_to_double(ST0);
if (fptemp>0.0){
fptemp = log(fptemp)/log(2.0); /* log2(ST) */
- fptemp *= CPU86_LDouble_to_double(ST1);
- ST1 = double_to_CPU86_LDouble(fptemp);
+ fptemp *= floatx80_to_double(ST1);
+ ST1 = double_to_floatx80(fptemp);
fpop();
} else {
env->fpus &= (~0x4700);
void helper_fptan(void)
{
- double fptemp = CPU86_LDouble_to_double(ST0);
+ double fptemp = floatx80_to_double(ST0);
if((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
env->fpus |= 0x400;
} else {
fptemp = tan(fptemp);
- ST0 = double_to_CPU86_LDouble(fptemp);
+ ST0 = double_to_floatx80(fptemp);
fpush();
- ST0 = floatx_one;
+ ST0 = floatx80_one;
env->fpus &= (~0x400); /* C2 <-- 0 */
/* the above code is for |arg| < 2**52 only */
}
{
double fptemp, fpsrcop;
- fpsrcop = CPU86_LDouble_to_double(ST1);
- fptemp = CPU86_LDouble_to_double(ST0);
- ST1 = double_to_CPU86_LDouble(atan2(fpsrcop, fptemp));
+ fpsrcop = floatx80_to_double(ST1);
+ fptemp = floatx80_to_double(ST0);
+ ST1 = double_to_floatx80(atan2(fpsrcop, fptemp));
fpop();
}
void helper_fxtract(void)
{
- CPU86_LDoubleU temp;
+ CPU_LDoubleU temp;
temp.d = ST0;
- if (floatx_is_zero(ST0)) {
+ if (floatx80_is_zero(ST0)) {
/* Easy way to generate -inf and raising division by 0 exception */
- ST0 = floatx_div(floatx_chs(floatx_one), floatx_zero, &env->fp_status);
+ ST0 = floatx80_div(floatx80_chs(floatx80_one), floatx80_zero, &env->fp_status);
fpush();
ST0 = temp.d;
} else {
expdif = EXPD(temp) - EXPBIAS;
/*DP exponent bias*/
- ST0 = int32_to_floatx(expdif, &env->fp_status);
+ ST0 = int32_to_floatx80(expdif, &env->fp_status);
fpush();
BIASEXPONENT(temp);
ST0 = temp.d;
void helper_fprem1(void)
{
double st0, st1, dblq, fpsrcop, fptemp;
- CPU86_LDoubleU fpsrcop1, fptemp1;
+ CPU_LDoubleU fpsrcop1, fptemp1;
int expdif;
signed long long int q;
- st0 = CPU86_LDouble_to_double(ST0);
- st1 = CPU86_LDouble_to_double(ST1);
+ st0 = floatx80_to_double(ST0);
+ st1 = floatx80_to_double(ST1);
if (isinf(st0) || isnan(st0) || isnan(st1) || (st1 == 0.0)) {
- ST0 = double_to_CPU86_LDouble(0.0 / 0.0); /* NaN */
+ ST0 = double_to_floatx80(0.0 / 0.0); /* NaN */
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
return;
}
-(floor(fabs(fpsrcop))) : floor(fpsrcop);
st0 -= (st1 * fpsrcop * fptemp);
}
- ST0 = double_to_CPU86_LDouble(st0);
+ ST0 = double_to_floatx80(st0);
}
void helper_fprem(void)
{
double st0, st1, dblq, fpsrcop, fptemp;
- CPU86_LDoubleU fpsrcop1, fptemp1;
+ CPU_LDoubleU fpsrcop1, fptemp1;
int expdif;
signed long long int q;
- st0 = CPU86_LDouble_to_double(ST0);
- st1 = CPU86_LDouble_to_double(ST1);
+ st0 = floatx80_to_double(ST0);
+ st1 = floatx80_to_double(ST1);
if (isinf(st0) || isnan(st0) || isnan(st1) || (st1 == 0.0)) {
- ST0 = double_to_CPU86_LDouble(0.0 / 0.0); /* NaN */
+ ST0 = double_to_floatx80(0.0 / 0.0); /* NaN */
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
return;
}
-(floor(fabs(fpsrcop))) : floor(fpsrcop);
st0 -= (st1 * fpsrcop * fptemp);
}
- ST0 = double_to_CPU86_LDouble(st0);
+ ST0 = double_to_floatx80(st0);
}
void helper_fyl2xp1(void)
{
- double fptemp = CPU86_LDouble_to_double(ST0);
+ double fptemp = floatx80_to_double(ST0);
if ((fptemp+1.0)>0.0) {
fptemp = log(fptemp+1.0) / log(2.0); /* log2(ST+1.0) */
- fptemp *= CPU86_LDouble_to_double(ST1);
- ST1 = double_to_CPU86_LDouble(fptemp);
+ fptemp *= floatx80_to_double(ST1);
+ ST1 = double_to_floatx80(fptemp);
fpop();
} else {
env->fpus &= (~0x4700);
void helper_fsqrt(void)
{
- if (floatx_is_neg(ST0)) {
+ if (floatx80_is_neg(ST0)) {
env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
env->fpus |= 0x400;
}
- ST0 = floatx_sqrt(ST0, &env->fp_status);
+ ST0 = floatx80_sqrt(ST0, &env->fp_status);
}
void helper_fsincos(void)
{
- double fptemp = CPU86_LDouble_to_double(ST0);
+ double fptemp = floatx80_to_double(ST0);
if ((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
env->fpus |= 0x400;
} else {
- ST0 = double_to_CPU86_LDouble(sin(fptemp));
+ ST0 = double_to_floatx80(sin(fptemp));
fpush();
- ST0 = double_to_CPU86_LDouble(cos(fptemp));
+ ST0 = double_to_floatx80(cos(fptemp));
env->fpus &= (~0x400); /* C2 <-- 0 */
/* the above code is for |arg| < 2**63 only */
}
void helper_frndint(void)
{
- ST0 = floatx_round_to_int(ST0, &env->fp_status);
+ ST0 = floatx80_round_to_int(ST0, &env->fp_status);
}
void helper_fscale(void)
{
- if (floatx_is_any_nan(ST1)) {
+ if (floatx80_is_any_nan(ST1)) {
ST0 = ST1;
} else {
- int n = floatx_to_int32_round_to_zero(ST1, &env->fp_status);
- ST0 = floatx_scalbn(ST0, n, &env->fp_status);
+ int n = floatx80_to_int32_round_to_zero(ST1, &env->fp_status);
+ ST0 = floatx80_scalbn(ST0, n, &env->fp_status);
}
}
void helper_fsin(void)
{
- double fptemp = CPU86_LDouble_to_double(ST0);
+ double fptemp = floatx80_to_double(ST0);
if ((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
env->fpus |= 0x400;
} else {
- ST0 = double_to_CPU86_LDouble(sin(fptemp));
+ ST0 = double_to_floatx80(sin(fptemp));
env->fpus &= (~0x400); /* C2 <-- 0 */
/* the above code is for |arg| < 2**53 only */
}
void helper_fcos(void)
{
- double fptemp = CPU86_LDouble_to_double(ST0);
+ double fptemp = floatx80_to_double(ST0);
if((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
env->fpus |= 0x400;
} else {
- ST0 = double_to_CPU86_LDouble(cos(fptemp));
+ ST0 = double_to_floatx80(cos(fptemp));
env->fpus &= (~0x400); /* C2 <-- 0 */
/* the above code is for |arg5 < 2**63 only */
}
void helper_fxam_ST0(void)
{
- CPU86_LDoubleU temp;
+ CPU_LDoubleU temp;
int expdif;
temp.d = ST0;
/* XXX: test fptags too */
expdif = EXPD(temp);
if (expdif == MAXEXPD) {
-#ifdef USE_X86LDOUBLE
if (MANTD(temp) == 0x8000000000000000ULL)
-#else
- if (MANTD(temp) == 0)
-#endif
env->fpus |= 0x500 /*Infinity*/;
else
env->fpus |= 0x100 /*NaN*/;
{
int fpus, fptag, exp, i;
uint64_t mant;
- CPU86_LDoubleU tmp;
+ CPU_LDoubleU tmp;
fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
fptag = 0;
/* zero */
fptag |= 1;
} else if (exp == 0 || exp == MAXEXPD
-#ifdef USE_X86LDOUBLE
|| (mant & (1LL << 63)) == 0
-#endif
) {
/* NaNs, infinity, denormal */
fptag |= 2;
void helper_fsave(target_ulong ptr, int data32)
{
- CPU86_LDouble tmp;
+ floatx80 tmp;
int i;
helper_fstenv(ptr, data32);
void helper_frstor(target_ulong ptr, int data32)
{
- CPU86_LDouble tmp;
+ floatx80 tmp;
int i;
helper_fldenv(ptr, data32);
}
}
+
+#if defined(CONFIG_USER_ONLY)
+void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
+{
+ CPUX86State *saved_env;
+
+ saved_env = env;
+ env = s;
+ if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
+ selector &= 0xffff;
+ cpu_x86_load_seg_cache(env, seg_reg, selector,
+ (selector << 4), 0xffff, 0);
+ } else {
+ helper_load_seg(seg_reg, selector);
+ }
+ env = saved_env;
+}
+
+void cpu_x86_fsave(CPUX86State *s, target_ulong ptr, int data32)
+{
+ CPUX86State *saved_env;
+
+ saved_env = env;
+ env = s;
+
+ helper_fsave(ptr, data32);
+
+ env = saved_env;
+}
+
+void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32)
+{
+ CPUX86State *saved_env;
+
+ saved_env = env;
+ env = s;
+
+ helper_frstor(ptr, data32);
+
+ env = saved_env;
+}
+#endif
+
void helper_fxsave(target_ulong ptr, int data64)
{
int fpus, fptag, i, nb_xmm_regs;
- CPU86_LDouble tmp;
+ floatx80 tmp;
target_ulong addr;
/* The operand must be 16 byte aligned */
void helper_fxrstor(target_ulong ptr, int data64)
{
int i, fpus, fptag, nb_xmm_regs;
- CPU86_LDouble tmp;
+ floatx80 tmp;
target_ulong addr;
/* The operand must be 16 byte aligned */
}
}
-#ifndef USE_X86LDOUBLE
-
-void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, CPU86_LDouble f)
+void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
{
- CPU86_LDoubleU temp;
- int e;
-
- temp.d = f;
- /* mantissa */
- *pmant = (MANTD(temp) << 11) | (1LL << 63);
- /* exponent + sign */
- e = EXPD(temp) - EXPBIAS + 16383;
- e |= SIGND(temp) >> 16;
- *pexp = e;
-}
-
-CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper)
-{
- CPU86_LDoubleU temp;
- int e;
- uint64_t ll;
-
- /* XXX: handle overflow ? */
- e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
- e |= (upper >> 4) & 0x800; /* sign */
- ll = (mant >> 11) & ((1LL << 52) - 1);
-#ifdef __arm__
- temp.l.upper = (e << 20) | (ll >> 32);
- temp.l.lower = ll;
-#else
- temp.ll = ll | ((uint64_t)e << 52);
-#endif
- return temp.d;
-}
-
-#else
-
-void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, CPU86_LDouble f)
-{
- CPU86_LDoubleU temp;
+ CPU_LDoubleU temp;
temp.d = f;
*pmant = temp.l.lower;
*pexp = temp.l.upper;
}
-CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper)
+floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
{
- CPU86_LDoubleU temp;
+ CPU_LDoubleU temp;
temp.l.upper = upper;
temp.l.lower = mant;
return temp.d;
}
-#endif
#ifdef TARGET_X86_64
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
env->halted = 1;
env->exception_index = EXCP_HLT;
- cpu_loop_exit();
+ cpu_loop_exit(env);
}
void helper_hlt(int next_eip_addend)
void helper_debug(void)
{
env->exception_index = EXCP_DEBUG;
- cpu_loop_exit();
+ cpu_loop_exit(env);
}
void helper_reset_rf(void)
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
-void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
+void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
+ void *retaddr)
{
TranslationBlock *tb;
int ret;
unsigned long pc;
CPUX86State *saved_env;
- /* XXX: hack to restore env in all cases, even if not called from
- generated code */
saved_env = env;
- env = cpu_single_env;
+ env = env1;
- ret = cpu_x86_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
+ ret = cpu_x86_handle_mmu_fault(env, addr, is_write, mmu_idx);
if (ret) {
if (retaddr) {
/* now we have a real cpu fault */
{
}
+void svm_check_intercept(CPUState *env1, uint32_t type)
+{
+}
+
void helper_svm_check_io(uint32_t port, uint32_t param,
uint32_t next_eip_addend)
{
env->exception_next_eip = -1;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "INTR");
/* XXX: is it always correct ? */
- do_interrupt(vector, 0, 0, 0, 1);
+ do_interrupt_all(vector, 0, 0, 0, 1);
break;
case SVM_EVTINJ_TYPE_NMI:
env->exception_index = EXCP02_NMI;
env->exception_is_int = 0;
env->exception_next_eip = EIP;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI");
- cpu_loop_exit();
+ cpu_loop_exit(env);
break;
case SVM_EVTINJ_TYPE_EXEPT:
env->exception_index = vector;
env->exception_is_int = 0;
env->exception_next_eip = -1;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "EXEPT");
- cpu_loop_exit();
+ cpu_loop_exit(env);
break;
case SVM_EVTINJ_TYPE_SOFT:
env->exception_index = vector;
env->exception_is_int = 1;
env->exception_next_eip = EIP;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT");
- cpu_loop_exit();
+ cpu_loop_exit(env);
break;
}
qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", env->exception_index, env->error_code);
}
}
+void svm_check_intercept(CPUState *env1, uint32_t type)
+{
+ CPUState *saved_env;
+
+ saved_env = env;
+ env = env1;
+ helper_svm_check_intercept_param(type, 0);
+ env = saved_env;
+}
+
void helper_svm_check_io(uint32_t port, uint32_t param,
uint32_t next_eip_addend)
{
env->error_code = 0;
env->old_exception = -1;
- cpu_loop_exit();
+ cpu_loop_exit(env);
}
#endif
}
}
+uint32_t cpu_cc_compute_all(CPUState *env1, int op)
+{
+ CPUState *saved_env;
+ uint32_t ret;
+
+ saved_env = env;
+ env = env1;
+ ret = helper_cc_compute_all(op);
+ env = saved_env;
+ return ret;
+}
+
uint32_t helper_cc_compute_c(int op)
{
switch (op) {
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