}
next_tb = 0;
}
-#elif defined(TARGET_LM32)
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->ie & IE_IE)) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-#elif defined(TARGET_MICROBLAZE)
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->sregs[SR_MSR] & MSR_IE)
- && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP))
- && !(env->iflags & (D_FLAG | IMM_FLAG))) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-#elif defined(TARGET_MIPS)
- if ((interrupt_request & CPU_INTERRUPT_HARD) &&
- cpu_mips_hw_interrupts_pending(env)) {
- /* Raise it */
- cpu->exception_index = EXCP_EXT_INTERRUPT;
- env->error_code = 0;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-#elif defined(TARGET_TRICORE)
- if ((interrupt_request & CPU_INTERRUPT_HARD)) {
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-
-#elif defined(TARGET_OPENRISC)
- {
- int idx = -1;
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->sr & SR_IEE)) {
- idx = EXCP_INT;
- }
- if ((interrupt_request & CPU_INTERRUPT_TIMER)
- && (env->sr & SR_TEE)) {
- idx = EXCP_TICK;
- }
- if (idx >= 0) {
- cpu->exception_index = idx;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- }
-#elif defined(TARGET_SPARC)
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- if (cpu_interrupts_enabled(env) &&
- env->interrupt_index > 0) {
- int pil = env->interrupt_index & 0xf;
- int type = env->interrupt_index & 0xf0;
-
- if (((type == TT_EXTINT) &&
- cpu_pil_allowed(env, pil)) ||
- type != TT_EXTINT) {
- cpu->exception_index = env->interrupt_index;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- }
- }
-#elif defined(TARGET_ARM)
- if (interrupt_request & CPU_INTERRUPT_FIQ
- && !(env->daif & PSTATE_F)) {
- cpu->exception_index = EXCP_FIQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- /* ARMv7-M interrupt return works by loading a magic value
- into the PC. On real hardware the load causes the
- return to occur. The qemu implementation performs the
- jump normally, then does the exception return when the
- CPU tries to execute code at the magic address.
- This will cause the magic PC value to be pushed to
- the stack if an interrupt occurred at the wrong time.
- We avoid this by disabling interrupts when
- pc contains a magic address. */
- if (interrupt_request & CPU_INTERRUPT_HARD
- && !(env->daif & PSTATE_I)
- && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
#endif
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,