* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include "config.h"
+#include "qemu/osdep.h"
#include "cpu.h"
#include "trace.h"
#include "disas/disas.h"
#include "qemu/atomic.h"
#include "sysemu/qtest.h"
#include "qemu/timer.h"
+#include "exec/address-spaces.h"
+#include "qemu/rcu.h"
+#include "exec/tb-hash.h"
+#include "exec/log.h"
+#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
+#include "hw/i386/apic.h"
+#endif
+#include "sysemu/replay.h"
/* -icount align implementation. */
sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
if (nanosleep(&sleep_delay, &rem_delay) < 0) {
- sc->diff_clk -= (sleep_delay.tv_sec - rem_delay.tv_sec) * 1000000000LL;
- sc->diff_clk -= sleep_delay.tv_nsec - rem_delay.tv_nsec;
+ sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
} else {
sc->diff_clk = 0;
}
if (!icount_align_option) {
return;
}
- sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
- sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
- sc->realtime_clock +
- cpu_get_clock_offset();
+ sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
+ sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
if (sc->diff_clk < max_delay) {
max_delay = sc->diff_clk;
}
#endif /* CONFIG USER ONLY */
-void cpu_loop_exit(CPUState *cpu)
-{
- cpu->current_tb = NULL;
- siglongjmp(cpu->jmp_env, 1);
-}
-
-/* exit the current TB from a signal handler. The host registers are
- restored in a state compatible with the CPU emulator
- */
-#if defined(CONFIG_SOFTMMU)
-void cpu_resume_from_signal(CPUState *cpu, void *puc)
-{
- /* XXX: restore cpu registers saved in host registers */
-
- cpu->exception_index = -1;
- siglongjmp(cpu->jmp_env, 1);
-}
-#endif
-
/* Execute a TB, and fix up the CPU state afterwards if necessary */
static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
{
}
#endif /* DEBUG_DISAS */
+ cpu->can_do_io = !use_icount;
next_tb = tcg_qemu_tb_exec(env, tb_ptr);
+ cpu->can_do_io = 1;
trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
next_tb & TB_EXIT_MASK);
/* Execute the code without caching the generated code. An interpreter
could be used if available. */
-static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
- TranslationBlock *orig_tb)
+static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
+ TranslationBlock *orig_tb, bool ignore_icount)
{
- CPUState *cpu = ENV_GET_CPU(env);
TranslationBlock *tb;
/* Should never happen.
max_cycles = CF_COUNT_MASK;
tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
- max_cycles);
+ max_cycles | CF_NOCACHE
+ | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
+ tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
cpu->current_tb = tb;
/* execute the generated code */
trace_exec_tb_nocache(tb, tb->pc);
tb_free(tb);
}
-static TranslationBlock *tb_find_slow(CPUArchState *env,
- target_ulong pc,
- target_ulong cs_base,
- uint64_t flags)
+static TranslationBlock *tb_find_physical(CPUState *cpu,
+ target_ulong pc,
+ target_ulong cs_base,
+ uint64_t flags)
{
- CPUState *cpu = ENV_GET_CPU(env);
+ CPUArchState *env = (CPUArchState *)cpu->env_ptr;
TranslationBlock *tb, **ptb1;
unsigned int h;
tb_page_addr_t phys_pc, phys_page1;
ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
for(;;) {
tb = *ptb1;
- if (!tb)
- goto not_found;
+ if (!tb) {
+ return NULL;
+ }
if (tb->pc == pc &&
tb->page_addr[0] == phys_page1 &&
tb->cs_base == cs_base &&
virt_page2 = (pc & TARGET_PAGE_MASK) +
TARGET_PAGE_SIZE;
phys_page2 = get_page_addr_code(env, virt_page2);
- if (tb->page_addr[1] == phys_page2)
- goto found;
+ if (tb->page_addr[1] == phys_page2) {
+ break;
+ }
} else {
- goto found;
+ break;
}
}
ptb1 = &tb->phys_hash_next;
}
- not_found:
- /* if no translated code available, then translate it now */
- tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
- found:
- /* Move the last found TB to the head of the list */
- if (likely(*ptb1)) {
- *ptb1 = tb->phys_hash_next;
- tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
- tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
+ /* Move the TB to the head of the list */
+ *ptb1 = tb->phys_hash_next;
+ tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
+ tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
+ return tb;
+}
+
+static TranslationBlock *tb_find_slow(CPUState *cpu,
+ target_ulong pc,
+ target_ulong cs_base,
+ uint64_t flags)
+{
+ TranslationBlock *tb;
+
+ tb = tb_find_physical(cpu, pc, cs_base, flags);
+ if (tb) {
+ goto found;
+ }
+
+#ifdef CONFIG_USER_ONLY
+ /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
+ * taken outside tb_lock. Since we're momentarily dropping
+ * tb_lock, there's a chance that our desired tb has been
+ * translated.
+ */
+ tb_unlock();
+ mmap_lock();
+ tb_lock();
+ tb = tb_find_physical(cpu, pc, cs_base, flags);
+ if (tb) {
+ mmap_unlock();
+ goto found;
}
+#endif
+
+ /* if no translated code available, then translate it now */
+ tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
+
+#ifdef CONFIG_USER_ONLY
+ mmap_unlock();
+#endif
+
+found:
/* we add the TB in the virtual pc hash table */
cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
return tb;
}
-static inline TranslationBlock *tb_find_fast(CPUArchState *env)
+static inline TranslationBlock *tb_find_fast(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
+ CPUArchState *env = (CPUArchState *)cpu->env_ptr;
TranslationBlock *tb;
target_ulong cs_base, pc;
int flags;
tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
tb->flags != flags)) {
- tb = tb_find_slow(env, pc, cs_base, flags);
+ tb = tb_find_slow(cpu, pc, cs_base, flags);
}
return tb;
}
-static void cpu_handle_debug_exception(CPUArchState *env)
+static void cpu_handle_debug_exception(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
CPUClass *cc = CPU_GET_CLASS(cpu);
CPUWatchpoint *wp;
/* main execution loop */
-volatile sig_atomic_t exit_request;
-
-int cpu_exec(CPUArchState *env)
+int cpu_exec(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
CPUClass *cc = CPU_GET_CLASS(cpu);
#ifdef TARGET_I386
X86CPU *x86_cpu = X86_CPU(cpu);
+ CPUArchState *env = &x86_cpu->env;
#endif
int ret, interrupt_request;
TranslationBlock *tb;
uintptr_t next_tb;
SyncClocks sc;
- /* This must be volatile so it is not trashed by longjmp() */
- volatile bool have_tb_lock = false;
+ /* replay_interrupt may need current_cpu */
+ current_cpu = cpu;
if (cpu->halted) {
+#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
+ if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
+ && replay_interrupt()) {
+ apic_poll_irq(x86_cpu->apic_state);
+ cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
+ }
+#endif
if (!cpu_has_work(cpu)) {
+ current_cpu = NULL;
return EXCP_HALTED;
}
cpu->halted = 0;
}
- current_cpu = cpu;
-
- /* As long as current_cpu is null, up to the assignment just above,
- * requests by other threads to exit the execution loop are expected to
- * be issued using the exit_request global. We must make sure that our
- * evaluation of the global value is performed past the current_cpu
- * value transition point, which requires a memory barrier as well as
- * an instruction scheduling constraint on modern architectures. */
- smp_mb();
+ atomic_mb_set(&tcg_current_cpu, cpu);
+ rcu_read_lock();
- if (unlikely(exit_request)) {
+ if (unlikely(atomic_mb_read(&exit_request))) {
cpu->exit_request = 1;
}
cc->cpu_exec_enter(cpu);
- cpu->exception_index = -1;
/* Calculate difference between guest clock and host clock.
* This delay includes the delay of the last cycle, so
/* exit request from the cpu execution loop */
ret = cpu->exception_index;
if (ret == EXCP_DEBUG) {
- cpu_handle_debug_exception(env);
+ cpu_handle_debug_exception(cpu);
}
+ cpu->exception_index = -1;
break;
} else {
#if defined(CONFIG_USER_ONLY)
cc->do_interrupt(cpu);
#endif
ret = cpu->exception_index;
+ cpu->exception_index = -1;
break;
#else
- cc->do_interrupt(cpu);
- cpu->exception_index = -1;
+ if (replay_exception()) {
+ cc->do_interrupt(cpu);
+ cpu->exception_index = -1;
+ } else if (!replay_has_interrupt()) {
+ /* give a chance to iothread in replay mode */
+ ret = EXCP_INTERRUPT;
+ break;
+ }
#endif
}
+ } else if (replay_has_exception()
+ && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
+ /* try to cause an exception pending in the log */
+ cpu_exec_nocache(cpu, 1, tb_find_fast(cpu), true);
+ ret = -1;
+ break;
}
next_tb = 0; /* force lookup of first TB */
cpu->exception_index = EXCP_DEBUG;
cpu_loop_exit(cpu);
}
-#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_MIPS) || \
- defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
- defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || \
- defined(TARGET_UNICORE32) || defined(TARGET_TRICORE)
- if (interrupt_request & CPU_INTERRUPT_HALT) {
+ if (replay_mode == REPLAY_MODE_PLAY
+ && !replay_has_interrupt()) {
+ /* Do nothing */
+ } else if (interrupt_request & CPU_INTERRUPT_HALT) {
+ replay_interrupt();
cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
cpu->halted = 1;
cpu->exception_index = EXCP_HLT;
cpu_loop_exit(cpu);
}
-#endif
#if defined(TARGET_I386)
- if (interrupt_request & CPU_INTERRUPT_INIT) {
+ else if (interrupt_request & CPU_INTERRUPT_INIT) {
+ replay_interrupt();
cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
do_cpu_init(x86_cpu);
cpu->exception_index = EXCP_HALTED;
cpu_loop_exit(cpu);
}
#else
- if (interrupt_request & CPU_INTERRUPT_RESET) {
+ else if (interrupt_request & CPU_INTERRUPT_RESET) {
+ replay_interrupt();
cpu_reset(cpu);
- }
-#endif
-#if defined(TARGET_I386)
-#if !defined(CONFIG_USER_ONLY)
- if (interrupt_request & CPU_INTERRUPT_POLL) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_POLL;
- apic_poll_irq(x86_cpu->apic_state);
- }
-#endif
- if (interrupt_request & CPU_INTERRUPT_SIPI) {
- do_cpu_sipi(x86_cpu);
- } else if (env->hflags2 & HF2_GIF_MASK) {
- if ((interrupt_request & CPU_INTERRUPT_SMI) &&
- !(env->hflags & HF_SMM_MASK)) {
- cpu_svm_check_intercept_param(env, SVM_EXIT_SMI,
- 0);
- cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;
- do_smm_enter(x86_cpu);
- next_tb = 0;
- } else if ((interrupt_request & CPU_INTERRUPT_NMI) &&
- !(env->hflags2 & HF2_NMI_MASK)) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
- env->hflags2 |= HF2_NMI_MASK;
- do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
- next_tb = 0;
- } else if (interrupt_request & CPU_INTERRUPT_MCE) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_MCE;
- do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);
- next_tb = 0;
- } else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
- (((env->hflags2 & HF2_VINTR_MASK) &&
- (env->hflags2 & HF2_HIF_MASK)) ||
- (!(env->hflags2 & HF2_VINTR_MASK) &&
- (env->eflags & IF_MASK &&
- !(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
- int intno;
- cpu_svm_check_intercept_param(env, SVM_EXIT_INTR,
- 0);
- cpu->interrupt_request &= ~(CPU_INTERRUPT_HARD |
- CPU_INTERRUPT_VIRQ);
- intno = cpu_get_pic_interrupt(env);
- qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
- do_interrupt_x86_hardirq(env, intno, 1);
- /* ensure that no TB jump will be modified as
- the program flow was changed */
- next_tb = 0;
-#if !defined(CONFIG_USER_ONLY)
- } else if ((interrupt_request & CPU_INTERRUPT_VIRQ) &&
- (env->eflags & IF_MASK) &&
- !(env->hflags & HF_INHIBIT_IRQ_MASK)) {
- int intno;
- /* FIXME: this should respect TPR */
- cpu_svm_check_intercept_param(env, SVM_EXIT_VINTR,
- 0);
- intno = ldl_phys(cpu->as,
- env->vm_vmcb
- + offsetof(struct vmcb,
- control.int_vector));
- qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
- do_interrupt_x86_hardirq(env, intno, 1);
- cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
- next_tb = 0;
-#endif
- }
- }
-#elif defined(TARGET_PPC)
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- ppc_hw_interrupt(env);
- if (env->pending_interrupts == 0) {
- cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
- }
- next_tb = 0;
- }
-#elif defined(TARGET_LM32)
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->ie & IE_IE)) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-#elif defined(TARGET_MICROBLAZE)
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->sregs[SR_MSR] & MSR_IE)
- && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP))
- && !(env->iflags & (D_FLAG | IMM_FLAG))) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-#elif defined(TARGET_MIPS)
- if ((interrupt_request & CPU_INTERRUPT_HARD) &&
- cpu_mips_hw_interrupts_pending(env)) {
- /* Raise it */
- cpu->exception_index = EXCP_EXT_INTERRUPT;
- env->error_code = 0;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-#elif defined(TARGET_TRICORE)
- if ((interrupt_request & CPU_INTERRUPT_HARD)) {
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
-
-#elif defined(TARGET_OPENRISC)
- {
- int idx = -1;
- if ((interrupt_request & CPU_INTERRUPT_HARD)
- && (env->sr & SR_IEE)) {
- idx = EXCP_INT;
- }
- if ((interrupt_request & CPU_INTERRUPT_TIMER)
- && (env->sr & SR_TEE)) {
- idx = EXCP_TICK;
- }
- if (idx >= 0) {
- cpu->exception_index = idx;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- }
-#elif defined(TARGET_SPARC)
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- if (cpu_interrupts_enabled(env) &&
- env->interrupt_index > 0) {
- int pil = env->interrupt_index & 0xf;
- int type = env->interrupt_index & 0xf0;
-
- if (((type == TT_EXTINT) &&
- cpu_pil_allowed(env, pil)) ||
- type != TT_EXTINT) {
- cpu->exception_index = env->interrupt_index;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- }
- }
-#elif defined(TARGET_ARM)
- if (interrupt_request & CPU_INTERRUPT_FIQ
- && !(env->daif & PSTATE_F)) {
- cpu->exception_index = EXCP_FIQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
- /* ARMv7-M interrupt return works by loading a magic value
- into the PC. On real hardware the load causes the
- return to occur. The qemu implementation performs the
- jump normally, then does the exception return when the
- CPU tries to execute code at the magic address.
- This will cause the magic PC value to be pushed to
- the stack if an interrupt occurred at the wrong time.
- We avoid this by disabling interrupts when
- pc contains a magic address. */
- if (interrupt_request & CPU_INTERRUPT_HARD
- && !(env->daif & PSTATE_I)
- && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
- cpu->exception_index = EXCP_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
+ cpu_loop_exit(cpu);
}
#endif
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,
True when it is, and we should restart on a new TB,
and via longjmp via cpu_loop_exit. */
- if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
- next_tb = 0;
+ else {
+ replay_interrupt();
+ if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
+ next_tb = 0;
+ }
}
/* Don't use the cached interrupt_request value,
do_interrupt may have updated the EXITTB flag. */
next_tb = 0;
}
}
- if (unlikely(cpu->exit_request)) {
+ if (unlikely(cpu->exit_request
+ || replay_has_interrupt())) {
cpu->exit_request = 0;
cpu->exception_index = EXCP_INTERRUPT;
cpu_loop_exit(cpu);
}
- spin_lock(&tcg_ctx.tb_ctx.tb_lock);
- have_tb_lock = true;
- tb = tb_find_fast(env);
+ tb_lock();
+ tb = tb_find_fast(cpu);
/* Note: we do it here to avoid a gcc bug on Mac OS X when
doing it in tb_find_slow */
if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
/* see if we can patch the calling TB. When the TB
spans two pages, we cannot safely do a direct
jump. */
- if (next_tb != 0 && tb->page_addr[1] == -1) {
+ if (next_tb != 0 && tb->page_addr[1] == -1
+ && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
next_tb & TB_EXIT_MASK, tb);
}
- have_tb_lock = false;
- spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
-
- /* cpu_interrupt might be called while translating the
- TB, but before it is linked into a potentially
- infinite loop and becomes env->current_tb. Avoid
- starting execution if there is a pending interrupt. */
- cpu->current_tb = tb;
- barrier();
+ tb_unlock();
if (likely(!cpu->exit_request)) {
trace_exec_tb(tb, tb->pc);
tc_ptr = tb->tc_ptr;
/* execute the generated code */
+ cpu->current_tb = tb;
next_tb = cpu_tb_exec(cpu, tc_ptr);
+ cpu->current_tb = NULL;
switch (next_tb & TB_EXIT_MASK) {
case TB_EXIT_REQUESTED:
/* Something asked us to stop executing
* loop. Whatever requested the exit will also
* have set something else (eg exit_request or
* interrupt_request) which we will handle
- * next time around the loop.
+ * next time around the loop. But we need to
+ * ensure the tcg_exit_req read in generated code
+ * comes before the next read of cpu->exit_request
+ * or cpu->interrupt_request.
*/
- tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
+ smp_rmb();
next_tb = 0;
break;
case TB_EXIT_ICOUNT_EXPIRED:
{
/* Instruction counter expired. */
- int insns_left;
- tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
- insns_left = cpu->icount_decr.u32;
+ int insns_left = cpu->icount_decr.u32;
if (cpu->icount_extra && insns_left >= 0) {
/* Refill decrementer and continue execution. */
cpu->icount_extra += insns_left;
- if (cpu->icount_extra > 0xffff) {
- insns_left = 0xffff;
- } else {
- insns_left = cpu->icount_extra;
- }
+ insns_left = MIN(0xffff, cpu->icount_extra);
cpu->icount_extra -= insns_left;
cpu->icount_decr.u16.low = insns_left;
} else {
if (insns_left > 0) {
/* Execute remaining instructions. */
- cpu_exec_nocache(env, insns_left, tb);
+ tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
+ cpu_exec_nocache(cpu, insns_left, tb, false);
align_clocks(&sc, cpu);
}
cpu->exception_index = EXCP_INTERRUPT;
break;
}
}
- cpu->current_tb = NULL;
/* Try to align the host and virtual clocks
if the guest is in advance */
align_clocks(&sc, cpu);
only be set by a memory fault) */
} /* for(;;) */
} else {
- /* Reload env after longjmp - the compiler may have smashed all
- * local variables as longjmp is marked 'noreturn'. */
+#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
+ /* Some compilers wrongly smash all local variables after
+ * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
+ * Reload essential local variables here for those compilers.
+ * Newer versions of gcc would complain about this code (-Wclobbered). */
cpu = current_cpu;
- env = cpu->env_ptr;
cc = CPU_GET_CLASS(cpu);
#ifdef TARGET_I386
x86_cpu = X86_CPU(cpu);
+ env = &x86_cpu->env;
#endif
- if (have_tb_lock) {
- spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
- have_tb_lock = false;
- }
+#else /* buggy compiler */
+ /* Assert that the compiler does not smash local variables. */
+ g_assert(cpu == current_cpu);
+ g_assert(cc == CPU_GET_CLASS(cpu));
+#ifdef TARGET_I386
+ g_assert(x86_cpu == X86_CPU(cpu));
+ g_assert(env == &x86_cpu->env);
+#endif
+#endif /* buggy compiler */
+ cpu->can_do_io = 1;
+ tb_lock_reset();
}
} /* for(;;) */
cc->cpu_exec_exit(cpu);
+ rcu_read_unlock();
/* fail safe : never use current_cpu outside cpu_exec() */
current_cpu = NULL;
+
+ /* Does not need atomic_mb_set because a spurious wakeup is okay. */
+ atomic_set(&tcg_current_cpu, NULL);
return ret;
}
projects / qemu.git / blobdiff