* GNU GPL, version 2 or (at your option) any later version.
*/
+#include "qemu/osdep.h"
#include "hw/hw.h"
-#include "hw/i386/pc.h"
#include "hw/isa/vt82c686.h"
#include "hw/i2c/i2c.h"
-#include "hw/i2c/smbus.h"
#include "hw/pci/pci.h"
#include "hw/isa/isa.h"
+#include "hw/isa/superio.h"
#include "hw/sysbus.h"
#include "hw/mips/mips.h"
#include "hw/isa/apm.h"
#include "hw/acpi/acpi.h"
#include "hw/i2c/pm_smbus.h"
#include "sysemu/sysemu.h"
+#include "qemu/module.h"
#include "qemu/timer.h"
#include "exec/address-spaces.h"
//#define DEBUG_VT82C686B
#ifdef DEBUG_VT82C686B
-#define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __FUNCTION__, ##__VA_ARGS__)
+#define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __func__, ##__VA_ARGS__)
#else
#define DPRINTF(fmt, ...)
#endif
SuperIOConfig superio_conf;
} VT82C686BState;
+#define TYPE_VT82C686B_DEVICE "VT82C686B"
+#define VT82C686B_DEVICE(obj) \
+ OBJECT_CHECK(VT82C686BState, (obj), TYPE_VT82C686B_DEVICE)
+
static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data,
unsigned size)
{
{
PCIDevice *d = opaque;
uint8_t *pci_conf = d->config;
- VT82C686BState *vt82c = DO_UPCAST(VT82C686BState, dev, d);
+ VT82C686BState *vt82c = VT82C686B_DEVICE(d);
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
static void vt82c686b_write_config(PCIDevice * d, uint32_t address,
uint32_t val, int len)
{
- VT82C686BState *vt686 = DO_UPCAST(VT82C686BState, dev, d);
+ VT82C686BState *vt686 = VT82C686B_DEVICE(d);
DPRINTF("vt82c686b_write_config address 0x%x val 0x%x len 0x%x\n",
address, val, len);
PCIDevice dev;
} VT686MC97State;
+#define TYPE_VT82C686B_PM_DEVICE "VT82C686B_PM"
+#define VT82C686B_PM_DEVICE(obj) \
+ OBJECT_CHECK(VT686PMState, (obj), TYPE_VT82C686B_PM_DEVICE)
+
+#define TYPE_VT82C686B_MC97_DEVICE "VT82C686B_MC97"
+#define VT82C686B_MC97_DEVICE(obj) \
+ OBJECT_CHECK(VT686MC97State, (obj), TYPE_VT82C686B_MC97_DEVICE)
+
+#define TYPE_VT82C686B_AC97_DEVICE "VT82C686B_AC97"
+#define VT82C686B_AC97_DEVICE(obj) \
+ OBJECT_CHECK(VT686AC97State, (obj), TYPE_VT82C686B_AC97_DEVICE)
+
static void pm_update_sci(VT686PMState *s)
{
int sci_level, pmsts;
static void vt82c686b_ac97_realize(PCIDevice *dev, Error **errp)
{
- VT686AC97State *s = DO_UPCAST(VT686AC97State, dev, dev);
+ VT686AC97State *s = VT82C686B_AC97_DEVICE(dev);
uint8_t *pci_conf = s->dev.config;
pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_INVALIDATE |
{
PCIDevice *dev;
- dev = pci_create(bus, devfn, "VT82C686B_AC97");
+ dev = pci_create(bus, devfn, TYPE_VT82C686B_AC97_DEVICE);
qdev_init_nofail(&dev->qdev);
}
}
static const TypeInfo via_ac97_info = {
- .name = "VT82C686B_AC97",
+ .name = TYPE_VT82C686B_AC97_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(VT686AC97State),
.class_init = via_ac97_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static void vt82c686b_mc97_realize(PCIDevice *dev, Error **errp)
{
- VT686MC97State *s = DO_UPCAST(VT686MC97State, dev, dev);
+ VT686MC97State *s = VT82C686B_MC97_DEVICE(dev);
uint8_t *pci_conf = s->dev.config;
pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_INVALIDATE |
{
PCIDevice *dev;
- dev = pci_create(bus, devfn, "VT82C686B_MC97");
+ dev = pci_create(bus, devfn, TYPE_VT82C686B_MC97_DEVICE);
qdev_init_nofail(&dev->qdev);
}
}
static const TypeInfo via_mc97_info = {
- .name = "VT82C686B_MC97",
+ .name = TYPE_VT82C686B_MC97_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(VT686MC97State),
.class_init = via_mc97_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
/* vt82c686 pm init */
static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp)
{
- VT686PMState *s = DO_UPCAST(VT686PMState, dev, dev);
+ VT686PMState *s = VT82C686B_PM_DEVICE(dev);
uint8_t *pci_conf;
pci_conf = s->dev.config;
pci_conf[0x90] = s->smb_io_base | 1;
pci_conf[0x91] = s->smb_io_base >> 8;
pci_conf[0xd2] = 0x90;
- pm_smbus_init(&s->dev.qdev, &s->smb);
+ pm_smbus_init(DEVICE(s), &s->smb, false);
memory_region_add_subregion(get_system_io(), s->smb_io_base, &s->smb.io);
apm_init(dev, &s->apm, NULL, s);
PCIDevice *dev;
VT686PMState *s;
- dev = pci_create(bus, devfn, "VT82C686B_PM");
+ dev = pci_create(bus, devfn, TYPE_VT82C686B_PM_DEVICE);
qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);
- s = DO_UPCAST(VT686PMState, dev, dev);
+ s = VT82C686B_PM_DEVICE(dev);
qdev_init_nofail(&dev->qdev);
}
static const TypeInfo via_pm_info = {
- .name = "VT82C686B_PM",
+ .name = TYPE_VT82C686B_PM_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(VT686PMState),
.class_init = via_pm_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
};
static const VMStateDescription vmstate_via = {
/* init the PCI-to-ISA bridge */
static void vt82c686b_realize(PCIDevice *d, Error **errp)
{
- VT82C686BState *vt82c = DO_UPCAST(VT82C686BState, dev, d);
+ VT82C686BState *vt82c = VT82C686B_DEVICE(d);
uint8_t *pci_conf;
ISABus *isa_bus;
uint8_t *wmask;
int i;
isa_bus = isa_bus_new(DEVICE(d), get_system_memory(),
- pci_address_space_io(d));
+ pci_address_space_io(d), errp);
+ if (!isa_bus) {
+ return;
+ }
pci_conf = d->config;
pci_config_set_prog_interface(pci_conf, 0x0);
qemu_register_reset(vt82c686b_reset, d);
}
-ISABus *vt82c686b_init(PCIBus *bus, int devfn)
+ISABus *vt82c686b_isa_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
- d = pci_create_simple_multifunction(bus, devfn, true, "VT82C686B");
+ d = pci_create_simple_multifunction(bus, devfn, true,
+ TYPE_VT82C686B_DEVICE);
return ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0"));
}
* Reason: part of VIA VT82C686 southbridge, needs to be wired up,
* e.g. by mips_fulong2e_init()
*/
- dc->cannot_instantiate_with_device_add_yet = true;
+ dc->user_creatable = false;
}
static const TypeInfo via_info = {
- .name = "VT82C686B",
+ .name = TYPE_VT82C686B_DEVICE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(VT82C686BState),
.class_init = via_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
+};
+
+static void vt82c686b_superio_class_init(ObjectClass *klass, void *data)
+{
+ ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+
+ sc->serial.count = 2;
+ sc->parallel.count = 1;
+ sc->ide.count = 0;
+ sc->floppy.count = 1;
+}
+
+static const TypeInfo via_superio_info = {
+ .name = TYPE_VT82C686B_SUPERIO,
+ .parent = TYPE_ISA_SUPERIO,
+ .instance_size = sizeof(ISASuperIODevice),
+ .class_size = sizeof(ISASuperIOClass),
+ .class_init = vt82c686b_superio_class_init,
};
static void vt82c686b_register_types(void)
type_register_static(&via_ac97_info);
type_register_static(&via_mc97_info);
type_register_static(&via_pm_info);
+ type_register_static(&via_superio_info);
type_register_static(&via_info);
}
projects / qemu.git / blobdiff