/* Fixed */
#define BLOCK_SHIFT (PAGE_SHIFT + 6)
-struct onenand_s {
+typedef struct {
uint32_t id;
int shift;
target_phys_addr_t base;
uint16_t intstatus;
uint16_t wpstatus;
- struct ecc_state_s ecc;
+ ECCState ecc;
int density_mask;
int secs;
int secs_cur;
int blocks;
uint8_t *blockwp;
-};
+} OneNANDState;
enum {
ONEN_BUF_BLOCK = 0,
void onenand_base_update(void *opaque, target_phys_addr_t new)
{
- struct onenand_s *s = (struct onenand_s *) opaque;
+ OneNANDState *s = (OneNANDState *) opaque;
s->base = new;
void onenand_base_unmap(void *opaque)
{
- struct onenand_s *s = (struct onenand_s *) opaque;
+ OneNANDState *s = (OneNANDState *) opaque;
cpu_register_physical_memory(s->base,
0x10000 << s->shift, IO_MEM_UNASSIGNED);
}
-static void onenand_intr_update(struct onenand_s *s)
+static void onenand_intr_update(OneNANDState *s)
{
qemu_set_irq(s->intr, ((s->intstatus >> 15) ^ (~s->config[0] >> 6)) & 1);
}
/* Hot reset (Reset OneNAND command) or warm reset (RP pin low) */
-static void onenand_reset(struct onenand_s *s, int cold)
+static void onenand_reset(OneNANDState *s, int cold)
{
memset(&s->addr, 0, sizeof(s->addr));
s->command = 0;
}
}
-static inline int onenand_load_main(struct onenand_s *s, int sec, int secn,
+static inline int onenand_load_main(OneNANDState *s, int sec, int secn,
void *dest)
{
if (s->bdrv_cur)
return 0;
}
-static inline int onenand_prog_main(struct onenand_s *s, int sec, int secn,
+static inline int onenand_prog_main(OneNANDState *s, int sec, int secn,
void *src)
{
if (s->bdrv_cur)
return 0;
}
-static inline int onenand_load_spare(struct onenand_s *s, int sec, int secn,
+static inline int onenand_load_spare(OneNANDState *s, int sec, int secn,
void *dest)
{
uint8_t buf[512];
return 0;
}
-static inline int onenand_prog_spare(struct onenand_s *s, int sec, int secn,
+static inline int onenand_prog_spare(OneNANDState *s, int sec, int secn,
void *src)
{
uint8_t buf[512];
return 0;
}
-static inline int onenand_erase(struct onenand_s *s, int sec, int num)
+static inline int onenand_erase(OneNANDState *s, int sec, int num)
{
/* TODO: optimise */
uint8_t buf[512];
return 0;
}
-static void onenand_command(struct onenand_s *s, int cmd)
+static void onenand_command(OneNANDState *s, int cmd)
{
int b;
int sec;
static uint32_t onenand_read(void *opaque, target_phys_addr_t addr)
{
- struct onenand_s *s = (struct onenand_s *) opaque;
+ OneNANDState *s = (OneNANDState *) opaque;
int offset = addr >> s->shift;
switch (offset) {
static void onenand_write(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
- struct onenand_s *s = (struct onenand_s *) opaque;
+ OneNANDState *s = (OneNANDState *) opaque;
int offset = addr >> s->shift;
int sec;
void *onenand_init(uint32_t id, int regshift, qemu_irq irq)
{
- struct onenand_s *s = (struct onenand_s *) qemu_mallocz(sizeof(*s));
+ OneNANDState *s = (OneNANDState *) qemu_mallocz(sizeof(*s));
int bdrv_index = drive_get_index(IF_MTD, 0, 0);
uint32_t size = 1 << (24 + ((id >> 12) & 7));
void *ram;
void *onenand_raw_otp(void *opaque)
{
- struct onenand_s *s = (struct onenand_s *) opaque;
+ OneNANDState *s = (OneNANDState *) opaque;
return s->otp;
}