tcg/mips: fix MIPS32(R2) detection

[qemu.git] / tcg / mips / tcg-target.h

diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index d147e70eb15ec98196c5a08c2b8787dc1d295f13..7020d65845ffde76f5bd969ade461bdc4689d947 100644 (file)
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -88,16 +88,16 @@ typedef enum {
 #define TCG_TARGET_HAS_nand_i32         0
 
 /* optional instructions only implemented on MIPS4, MIPS32 and Loongson 2 */
-#if defined(_MIPS_ARCH_MIPS4) || defined(_MIPS_ARCH_MIPS32) || \
-    defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_LOONGSON2E) || \
-    defined(_MIPS_ARCH_LOONGSON2F)
+#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
+    defined(_MIPS_ARCH_LOONGSON2E) || defined(_MIPS_ARCH_LOONGSON2F) || \
+    defined(_MIPS_ARCH_MIPS4)
 #define TCG_TARGET_HAS_movcond_i32      1
 #else
 #define TCG_TARGET_HAS_movcond_i32      0
 #endif
 
 /* optional instructions only implemented on MIPS32R2 */
-#ifdef _MIPS_ARCH_MIPS32R2
+#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
 #define TCG_TARGET_HAS_bswap16_i32      1
 #define TCG_TARGET_HAS_bswap32_i32      1
 #define TCG_TARGET_HAS_rot_i32          1