#include "sysbus.h"
#include "hw.h"
-#include "net.h"
#include "flash.h"
#include "devices.h"
#include "boards.h"
#include "loader.h"
-#include "blockdev.h"
+#include "sysemu/blockdev.h"
#include "elf.h"
#include "lm32_hwsetup.h"
#include "lm32.h"
+#include "exec/address-spaces.h"
typedef struct {
- CPUState *env;
- target_phys_addr_t bootstrap_pc;
- target_phys_addr_t flash_base;
- target_phys_addr_t hwsetup_base;
- target_phys_addr_t initrd_base;
+ LM32CPU *cpu;
+ hwaddr bootstrap_pc;
+ hwaddr flash_base;
+ hwaddr hwsetup_base;
+ hwaddr initrd_base;
size_t initrd_size;
- target_phys_addr_t cmdline_base;
+ hwaddr cmdline_base;
} ResetInfo;
static void cpu_irq_handler(void *opaque, int irq, int level)
{
- CPUState *env = opaque;
+ CPULM32State *env = opaque;
if (level) {
cpu_interrupt(env, CPU_INTERRUPT_HARD);
static void main_cpu_reset(void *opaque)
{
ResetInfo *reset_info = opaque;
- CPUState *env = reset_info->env;
+ CPULM32State *env = &reset_info->cpu->env;
- cpu_reset(env);
+ cpu_reset(CPU(reset_info->cpu));
/* init defaults */
env->pc = (uint32_t)reset_info->bootstrap_pc;
env->deba = reset_info->flash_base;
}
-static void lm32_evr_init(ram_addr_t ram_size_not_used,
- const char *boot_device,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename, const char *cpu_model)
+static void lm32_evr_init(QEMUMachineInitArgs *args)
{
- CPUState *env;
+ const char *cpu_model = args->cpu_model;
+ const char *kernel_filename = args->kernel_filename;
+ LM32CPU *cpu;
+ CPULM32State *env;
DriveInfo *dinfo;
- ram_addr_t phys_ram;
+ MemoryRegion *address_space_mem = get_system_memory();
+ MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
qemu_irq *cpu_irq, irq[32];
ResetInfo *reset_info;
int i;
/* memory map */
- target_phys_addr_t flash_base = 0x04000000;
+ hwaddr flash_base = 0x04000000;
size_t flash_sector_size = 256 * 1024;
size_t flash_size = 32 * 1024 * 1024;
- target_phys_addr_t ram_base = 0x08000000;
+ hwaddr ram_base = 0x08000000;
size_t ram_size = 64 * 1024 * 1024;
- target_phys_addr_t timer0_base = 0x80002000;
- target_phys_addr_t uart0_base = 0x80006000;
- target_phys_addr_t timer1_base = 0x8000a000;
+ hwaddr timer0_base = 0x80002000;
+ hwaddr uart0_base = 0x80006000;
+ hwaddr timer1_base = 0x8000a000;
int uart0_irq = 0;
int timer0_irq = 1;
int timer1_irq = 3;
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
- env = cpu_init(cpu_model);
- reset_info->env = env;
+ cpu = cpu_lm32_init(cpu_model);
+ env = &cpu->env;
+ reset_info->cpu = cpu;
reset_info->flash_base = flash_base;
- phys_ram = qemu_ram_alloc(NULL, "lm32_evr.sdram", ram_size);
- cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
+ memory_region_init_ram(phys_ram, "lm32_evr.sdram", ram_size);
+ vmstate_register_ram_global(phys_ram);
+ memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
/* Spansion S29NS128P */
qemu_register_reset(main_cpu_reset, reset_info);
}
-static void lm32_uclinux_init(ram_addr_t ram_size_not_used,
- const char *boot_device,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename, const char *cpu_model)
+static void lm32_uclinux_init(QEMUMachineInitArgs *args)
{
- CPUState *env;
+ const char *cpu_model = args->cpu_model;
+ const char *kernel_filename = args->kernel_filename;
+ const char *kernel_cmdline = args->kernel_cmdline;
+ const char *initrd_filename = args->initrd_filename;
+ LM32CPU *cpu;
+ CPULM32State *env;
DriveInfo *dinfo;
- ram_addr_t phys_ram;
+ MemoryRegion *address_space_mem = get_system_memory();
+ MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
qemu_irq *cpu_irq, irq[32];
HWSetup *hw;
ResetInfo *reset_info;
int i;
/* memory map */
- target_phys_addr_t flash_base = 0x04000000;
+ hwaddr flash_base = 0x04000000;
size_t flash_sector_size = 256 * 1024;
size_t flash_size = 32 * 1024 * 1024;
- target_phys_addr_t ram_base = 0x08000000;
+ hwaddr ram_base = 0x08000000;
size_t ram_size = 64 * 1024 * 1024;
- target_phys_addr_t uart0_base = 0x80000000;
- target_phys_addr_t timer0_base = 0x80002000;
- target_phys_addr_t timer1_base = 0x80010000;
- target_phys_addr_t timer2_base = 0x80012000;
+ hwaddr uart0_base = 0x80000000;
+ hwaddr timer0_base = 0x80002000;
+ hwaddr timer1_base = 0x80010000;
+ hwaddr timer2_base = 0x80012000;
int uart0_irq = 0;
int timer0_irq = 1;
int timer1_irq = 20;
int timer2_irq = 21;
- target_phys_addr_t hwsetup_base = 0x0bffe000;
- target_phys_addr_t cmdline_base = 0x0bfff000;
- target_phys_addr_t initrd_base = 0x08400000;
+ hwaddr hwsetup_base = 0x0bffe000;
+ hwaddr cmdline_base = 0x0bfff000;
+ hwaddr initrd_base = 0x08400000;
size_t initrd_max = 0x01000000;
reset_info = g_malloc0(sizeof(ResetInfo));
if (cpu_model == NULL) {
cpu_model = "lm32-full";
}
- env = cpu_init(cpu_model);
- reset_info->env = env;
+ cpu = cpu_lm32_init(cpu_model);
+ env = &cpu->env;
+ reset_info->cpu = cpu;
reset_info->flash_base = flash_base;
- phys_ram = qemu_ram_alloc(NULL, "lm32_uclinux.sdram", ram_size);
- cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
+ memory_region_init_ram(phys_ram, "lm32_uclinux.sdram", ram_size);
+ vmstate_register_ram_global(phys_ram);
+ memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
/* Spansion S29NS128P */
.name = "lm32-evr",
.desc = "LatticeMico32 EVR32 eval system",
.init = lm32_evr_init,
- .is_default = 1
+ .is_default = 1,
+ DEFAULT_MACHINE_OPTIONS,
};
static QEMUMachine lm32_uclinux_machine = {
.name = "lm32-uclinux",
.desc = "lm32 platform for uClinux and u-boot by Theobroma Systems",
.init = lm32_uclinux_init,
- .is_default = 0
+ .is_default = 0,
+ DEFAULT_MACHINE_OPTIONS,
};
static void lm32_machine_init(void)
projects / qemu.git / blobdiff