*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
#include "cpu.h"
#include "hw/boards.h"
+#include "hw/irq.h"
+#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
+#include "migration/vmstate.h"
#include "strongarm.h"
#include "qemu/error-report.h"
#include "hw/arm/boot.h"
strongarm_uart_update_int_status(s);
}
-static void strongarm_uart_event(void *opaque, int event)
+static void strongarm_uart_event(void *opaque, QEMUChrEvent event)
{
StrongARMUARTState *s = opaque;
if (event == CHR_EVENT_BREAK) {
dc->desc = "StrongARM UART controller";
dc->reset = strongarm_uart_reset;
dc->vmsd = &vmstate_strongarm_uart_regs;
- dc->props = strongarm_uart_properties;
+ device_class_set_props(dc, strongarm_uart_properties);
dc->realize = strongarm_uart_realize;
}
};
/* Main CPU functions */
-StrongARMState *sa1110_init(MemoryRegion *sysmem,
- unsigned int sdram_size, const char *cpu_type)
+StrongARMState *sa1110_init(const char *cpu_type)
{
StrongARMState *s;
int i;
s->cpu = ARM_CPU(cpu_create(cpu_type));
- memory_region_allocate_system_memory(&s->sdram, NULL, "strongarm.sdram",
- sdram_size);
- memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
-
s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ),
qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ),