* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include "hw.h"
-#include "sun4m.h"
+
#include "console.h"
#include "pixel_ops.h"
+#include "sysbus.h"
+#include "qdev-addr.h"
#define MAXX 1024
#define MAXY 768
#define TCX_TEC_NREGS 0x1000
typedef struct TCXState {
+ SysBusDevice busdev;
target_phys_addr_t addr;
DisplayState *ds;
uint8_t *vram;
uint32_t *vram24, *cplane;
ram_addr_t vram_offset, vram24_offset, cplane_offset;
+ uint32_t vram_size;
uint16_t width, height, depth;
uint8_t r[256], g[256], b[256];
uint32_t palette[256];
static void tcx_screen_dump(void *opaque, const char *filename);
static void tcx24_screen_dump(void *opaque, const char *filename);
-static void tcx_invalidate_display(void *opaque);
-static void tcx24_invalidate_display(void *opaque);
+
+static void tcx_set_dirty(TCXState *s)
+{
+ unsigned int i;
+
+ for (i = 0; i < MAXX * MAXY; i += TARGET_PAGE_SIZE) {
+ cpu_physical_memory_set_dirty(s->vram_offset + i);
+ }
+}
+
+static void tcx24_set_dirty(TCXState *s)
+{
+ unsigned int i;
+
+ for (i = 0; i < MAXX * MAXY * 4; i += TARGET_PAGE_SIZE) {
+ cpu_physical_memory_set_dirty(s->vram24_offset + i);
+ cpu_physical_memory_set_dirty(s->cplane_offset + i);
+ }
+}
static void update_palette_entries(TCXState *s, int start, int end)
{
break;
}
}
- if (s->depth == 24)
- tcx24_invalidate_display(s);
- else
- tcx_invalidate_display(s);
+ if (s->depth == 24) {
+ tcx24_set_dirty(s);
+ } else {
+ tcx_set_dirty(s);
+ }
}
static void tcx_draw_line32(TCXState *s1, uint8_t *d,
p8++;
b = *p8++;
g = *p8++;
- r = *p8++;
+ r = *p8;
if (bgr)
dval = rgb_to_pixel32bgr(r, g, b);
else
static void tcx_invalidate_display(void *opaque)
{
TCXState *s = opaque;
- int i;
- for (i = 0; i < MAXX*MAXY; i += TARGET_PAGE_SIZE) {
- cpu_physical_memory_set_dirty(s->vram_offset + i);
- }
+ tcx_set_dirty(s);
+ qemu_console_resize(s->ds, s->width, s->height);
}
static void tcx24_invalidate_display(void *opaque)
{
TCXState *s = opaque;
- int i;
- tcx_invalidate_display(s);
- for (i = 0; i < MAXX*MAXY * 4; i += TARGET_PAGE_SIZE) {
- cpu_physical_memory_set_dirty(s->vram24_offset + i);
- cpu_physical_memory_set_dirty(s->cplane_offset + i);
- }
+ tcx_set_dirty(s);
+ tcx24_set_dirty(s);
+ qemu_console_resize(s->ds, s->width, s->height);
}
-static void tcx_save(QEMUFile *f, void *opaque)
+static int vmstate_tcx_post_load(void *opaque, int version_id)
{
TCXState *s = opaque;
- qemu_put_be16s(f, &s->height);
- qemu_put_be16s(f, &s->width);
- qemu_put_be16s(f, &s->depth);
- qemu_put_buffer(f, s->r, 256);
- qemu_put_buffer(f, s->g, 256);
- qemu_put_buffer(f, s->b, 256);
- qemu_put_8s(f, &s->dac_index);
- qemu_put_8s(f, &s->dac_state);
-}
-
-static int tcx_load(QEMUFile *f, void *opaque, int version_id)
-{
- TCXState *s = opaque;
- uint32_t dummy;
-
- if (version_id != 3 && version_id != 4)
- return -EINVAL;
-
- if (version_id == 3) {
- qemu_get_be32s(f, &dummy);
- qemu_get_be32s(f, &dummy);
- qemu_get_be32s(f, &dummy);
- }
- qemu_get_be16s(f, &s->height);
- qemu_get_be16s(f, &s->width);
- qemu_get_be16s(f, &s->depth);
- qemu_get_buffer(f, s->r, 256);
- qemu_get_buffer(f, s->g, 256);
- qemu_get_buffer(f, s->b, 256);
- qemu_get_8s(f, &s->dac_index);
- qemu_get_8s(f, &s->dac_state);
update_palette_entries(s, 0, 256);
- if (s->depth == 24)
- tcx24_invalidate_display(s);
- else
- tcx_invalidate_display(s);
+ if (s->depth == 24) {
+ tcx24_set_dirty(s);
+ } else {
+ tcx_set_dirty(s);
+ }
return 0;
}
-static void tcx_reset(void *opaque)
+static const VMStateDescription vmstate_tcx = {
+ .name ="tcx",
+ .version_id = 4,
+ .minimum_version_id = 4,
+ .minimum_version_id_old = 4,
+ .post_load = vmstate_tcx_post_load,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT16(height, TCXState),
+ VMSTATE_UINT16(width, TCXState),
+ VMSTATE_UINT16(depth, TCXState),
+ VMSTATE_BUFFER(r, TCXState),
+ VMSTATE_BUFFER(g, TCXState),
+ VMSTATE_BUFFER(b, TCXState),
+ VMSTATE_UINT8(dac_index, TCXState),
+ VMSTATE_UINT8(dac_state, TCXState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void tcx_reset(DeviceState *d)
{
- TCXState *s = opaque;
+ TCXState *s = container_of(d, TCXState, busdev.qdev);
/* Initialize palette */
memset(s->r, 0, 256);
return;
}
-static CPUReadMemoryFunc *tcx_dac_read[3] = {
+static CPUReadMemoryFunc * const tcx_dac_read[3] = {
NULL,
NULL,
tcx_dac_readl,
};
-static CPUWriteMemoryFunc *tcx_dac_write[3] = {
+static CPUWriteMemoryFunc * const tcx_dac_write[3] = {
NULL,
NULL,
tcx_dac_writel,
{
}
-static CPUReadMemoryFunc *tcx_dummy_read[3] = {
+static CPUReadMemoryFunc * const tcx_dummy_read[3] = {
NULL,
NULL,
tcx_dummy_readl,
};
-static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
+static CPUWriteMemoryFunc * const tcx_dummy_write[3] = {
NULL,
NULL,
tcx_dummy_writel,
};
-void tcx_init(target_phys_addr_t addr, int vram_size, int width, int height,
- int depth)
+static int tcx_init1(SysBusDevice *dev)
{
- TCXState *s;
+ TCXState *s = FROM_SYSBUS(TCXState, dev);
int io_memory, dummy_memory;
ram_addr_t vram_offset;
int size;
uint8_t *vram_base;
- vram_offset = qemu_ram_alloc(vram_size * (1 + 4 + 4));
+ vram_offset = qemu_ram_alloc(NULL, "tcx.vram", s->vram_size * (1 + 4 + 4));
vram_base = qemu_get_ram_ptr(vram_offset);
-
- s = qemu_mallocz(sizeof(TCXState));
- s->addr = addr;
s->vram_offset = vram_offset;
- s->width = width;
- s->height = height;
- s->depth = depth;
- // 8-bit plane
+ /* 8-bit plane */
s->vram = vram_base;
- size = vram_size;
- cpu_register_physical_memory(addr + 0x00800000ULL, size, vram_offset);
+ size = s->vram_size;
+ sysbus_init_mmio(dev, size, s->vram_offset);
vram_offset += size;
vram_base += size;
- io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
- cpu_register_physical_memory(addr + 0x00200000ULL, TCX_DAC_NREGS,
- io_memory);
+ /* DAC */
+ io_memory = cpu_register_io_memory(tcx_dac_read, tcx_dac_write, s);
+ sysbus_init_mmio(dev, TCX_DAC_NREGS, io_memory);
- dummy_memory = cpu_register_io_memory(0, tcx_dummy_read, tcx_dummy_write,
+ /* TEC (dummy) */
+ dummy_memory = cpu_register_io_memory(tcx_dummy_read, tcx_dummy_write,
s);
- cpu_register_physical_memory(addr + 0x00700000ULL, TCX_TEC_NREGS,
- dummy_memory);
- if (depth == 24) {
- // 24-bit plane
- size = vram_size * 4;
+ sysbus_init_mmio(dev, TCX_TEC_NREGS, dummy_memory);
+ /* THC: NetBSD writes here even with 8-bit display: dummy */
+ sysbus_init_mmio(dev, TCX_THC_NREGS_24, dummy_memory);
+
+ if (s->depth == 24) {
+ /* 24-bit plane */
+ size = s->vram_size * 4;
s->vram24 = (uint32_t *)vram_base;
s->vram24_offset = vram_offset;
- cpu_register_physical_memory(addr + 0x02000000ULL, size, vram_offset);
+ sysbus_init_mmio(dev, size, vram_offset);
vram_offset += size;
vram_base += size;
- // Control plane
- size = vram_size * 4;
+ /* Control plane */
+ size = s->vram_size * 4;
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
- cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
+ sysbus_init_mmio(dev, size, vram_offset);
+
s->ds = graphic_console_init(tcx24_update_display,
tcx24_invalidate_display,
tcx24_screen_dump, NULL, s);
} else {
- cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
- dummy_memory);
+ /* THC 8 bit (dummy) */
+ sysbus_init_mmio(dev, TCX_THC_NREGS_8, dummy_memory);
+
s->ds = graphic_console_init(tcx_update_display,
tcx_invalidate_display,
tcx_screen_dump, NULL, s);
}
- // NetBSD writes here even with 8-bit display
- cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,
- dummy_memory);
-
- register_savevm("tcx", addr, 4, tcx_save, tcx_load, s);
- qemu_register_reset(tcx_reset, s);
- tcx_reset(s);
- qemu_console_resize(s->ds, width, height);
+
+ qemu_console_resize(s->ds, s->width, s->height);
+ return 0;
}
static void tcx_screen_dump(void *opaque, const char *filename)
fclose(f);
return;
}
+
+static SysBusDeviceInfo tcx_info = {
+ .init = tcx_init1,
+ .qdev.name = "SUNW,tcx",
+ .qdev.size = sizeof(TCXState),
+ .qdev.reset = tcx_reset,
+ .qdev.vmsd = &vmstate_tcx,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_TADDR("addr", TCXState, addr, -1),
+ DEFINE_PROP_HEX32("vram_size", TCXState, vram_size, -1),
+ DEFINE_PROP_UINT16("width", TCXState, width, -1),
+ DEFINE_PROP_UINT16("height", TCXState, height, -1),
+ DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
+ DEFINE_PROP_END_OF_LIST(),
+ }
+};
+
+static void tcx_register_devices(void)
+{
+ sysbus_register_withprop(&tcx_info);
+}
+
+device_init(tcx_register_devices)
projects / qemu.git / blobdiff