static void RTL8139TallyCounters_save(QEMUFile* f, RTL8139TallyCounters *tally_counters);
typedef struct RTL8139State {
+ PCIDevice dev;
uint8_t phys[8]; /* mac address */
uint8_t mult[8]; /* multicast mask array */
uint16_t CpCmd;
uint8_t TxThresh;
- PCIDevice *pci_dev;
VLANClientState *vc;
uint8_t macaddr[6];
int rtl8139_mmio_io_addr;
uint32_t currTxDesc;
/* C+ mode */
+ uint32_t cplus_enabled;
+
uint32_t currCPlusRxDesc;
uint32_t currCPlusTxDesc;
DEBUG_PRINT(("RTL8139: Set IRQ to %d (%04x %04x)\n",
isr ? 1 : 0, s->IntrStatus, s->IntrMask));
- qemu_set_irq(s->pci_dev->irq[0], (isr != 0));
+ qemu_set_irq(s->dev.irq[0], (isr != 0));
}
#define POLYNOMIAL 0x04c11db6
#endif
}
-static int rtl8139_can_receive(void *opaque)
+static int rtl8139_can_receive(VLANClientState *vc)
{
- RTL8139State *s = opaque;
+ RTL8139State *s = vc->opaque;
int avail;
/* Receive (drop) packets if card is disabled. */
}
}
-static void rtl8139_do_receive(void *opaque, const uint8_t *buf, int size, int do_interrupt)
+static ssize_t rtl8139_do_receive(VLANClientState *vc, const uint8_t *buf, size_t size_, int do_interrupt)
{
- RTL8139State *s = opaque;
+ RTL8139State *s = vc->opaque;
+ int size = size_;
uint32_t packet_header = 0;
if (!s->clock_enabled)
{
DEBUG_PRINT(("RTL8139: stopped ==========================\n"));
- return;
+ return -1;
}
/* first check if receiver is enabled */
if (!rtl8139_receiver_enabled(s))
{
DEBUG_PRINT(("RTL8139: receiver disabled ================\n"));
- return;
+ return -1;
}
/* XXX: check this */
/* update tally counter */
++s->tally_counters.RxERR;
- return;
+ return size;
}
packet_header |= RxBroadcast;
/* update tally counter */
++s->tally_counters.RxERR;
- return;
+ return size;
}
int mcast_idx = compute_mcast_idx(buf);
/* update tally counter */
++s->tally_counters.RxERR;
- return;
+ return size;
}
packet_header |= RxMulticast;
/* update tally counter */
++s->tally_counters.RxERR;
- return;
+ return size;
}
packet_header |= RxPhysical;
/* update tally counter */
++s->tally_counters.RxERR;
- return;
+ return size;
}
}
++s->tally_counters.MissPkt;
rtl8139_update_irq(s);
- return;
+ return size_;
}
uint32_t rx_space = rxdw0 & CP_RX_BUFFER_SIZE_MASK;
++s->tally_counters.MissPkt;
rtl8139_update_irq(s);
- return;
+ return size_;
}
target_phys_addr_t rx_addr = rtl8139_addr64(rxbufLO, rxbufHI);
s->IntrStatus |= RxOverflow;
++s->RxMissed;
rtl8139_update_irq(s);
- return;
+ return size_;
}
packet_header |= RxStatusOK;
{
rtl8139_update_irq(s);
}
+
+ return size_;
}
-static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
+static ssize_t rtl8139_receive(VLANClientState *vc, const uint8_t *buf, size_t size)
{
- rtl8139_do_receive(opaque, buf, size, 1);
+ return rtl8139_do_receive(vc, buf, size, 1);
}
static void rtl8139_reset_rxring(RTL8139State *s, uint32_t bufferSize)
s->RxBufAddr = 0;
}
-static void rtl8139_reset(RTL8139State *s)
+static void rtl8139_reset(DeviceState *d)
{
+ RTL8139State *s = container_of(d, RTL8139State, dev.qdev);
int i;
/* restore MAC address */
s->eeprom.contents[0] = 0x8129;
#if 1
// PCI vendor and device ID should be mirrored here
- s->eeprom.contents[1] = 0x10ec;
- s->eeprom.contents[2] = 0x8139;
+ s->eeprom.contents[1] = PCI_VENDOR_ID_REALTEK;
+ s->eeprom.contents[2] = PCI_DEVICE_ID_REALTEK_8139;
#endif
s->eeprom.contents[7] = s->macaddr[0] | s->macaddr[1] << 8;
s->CSCR = CSCR_F_LINK_100 | CSCR_HEART_BIT | CSCR_LD;
s->CpCmd = 0x0; /* reset C+ mode */
+ s->cplus_enabled = 0;
+
// s->BasicModeCtrl = 0x3100; // 100Mbps, full duplex, autonegotiation
// s->BasicModeCtrl = 0x2100; // 100Mbps, full duplex
RTL8139TallyCounters_clear(&s->tally_counters);
}
-void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
+static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
{
counters->TxOk = 0;
counters->RxOk = 0;
if (val & CmdReset)
{
DEBUG_PRINT(("RTL8139: ChipCmd reset\n"));
- rtl8139_reset(s);
+ rtl8139_reset(&s->dev.qdev);
}
if (val & CmdRxEnb)
{
DEBUG_PRINT(("RTL8139C+ command register write(w) val=0x%04x\n", val));
+ s->cplus_enabled = 1;
+
/* mask unwriteable bits */
val = SET_MASKED(val, 0xff84, s->CpCmd);
} else if (opmode == 0x40) {
/* Reset. */
val = 0;
- rtl8139_reset(s);
+ rtl8139_reset(&s->dev.qdev);
}
s->Cfg9346 = val;
if (TxLoopBack == (s->TxConfig & TxLoopBack))
{
DEBUG_PRINT(("RTL8139: +++ transmit loopback mode\n"));
- rtl8139_do_receive(s, buf, size, do_interrupt);
+ rtl8139_do_receive(s->vc, buf, size, do_interrupt);
}
else
{
while (s->cplus_txbuffer && s->cplus_txbuffer_offset + txsize >= s->cplus_txbuffer_len)
{
s->cplus_txbuffer_len += CP_TX_BUFFER_SIZE;
- s->cplus_txbuffer = realloc(s->cplus_txbuffer, s->cplus_txbuffer_len);
+ s->cplus_txbuffer = qemu_realloc(s->cplus_txbuffer, s->cplus_txbuffer_len);
DEBUG_PRINT(("RTL8139: +++ C+ mode transmission buffer space changed to %d\n", s->cplus_txbuffer_len));
}
#define ETH_MTU 1500
/* ip packet header */
- ip_header *ip = 0;
+ ip_header *ip = NULL;
int hlen = 0;
uint8_t ip_protocol = 0;
uint16_t ip_data_len = 0;
- uint8_t *eth_payload_data = 0;
+ uint8_t *eth_payload_data = NULL;
size_t eth_payload_len = 0;
int proto = be16_to_cpu(*(uint16_t *)(saved_buffer + 12));
/* handle C+ transmit mode register configuration */
- if (rtl8139_cp_transmitter_enabled(s))
+ if (s->cplus_enabled)
{
DEBUG_PRINT(("RTL8139C+ DTCCR write offset=0x%x val=0x%08x descriptor=%d\n", txRegOffset, val, descriptor));
default:
DEBUG_PRINT(("RTL8139: ioport write(w) addr=0x%x val=0x%04x via write(b)\n", addr, val));
-#ifdef TARGET_WORDS_BIGENDIAN
- rtl8139_io_writeb(opaque, addr, (val >> 8) & 0xff);
- rtl8139_io_writeb(opaque, addr + 1, val & 0xff);
-#else
rtl8139_io_writeb(opaque, addr, val & 0xff);
rtl8139_io_writeb(opaque, addr + 1, (val >> 8) & 0xff);
-#endif
break;
}
}
default:
DEBUG_PRINT(("RTL8139: ioport write(l) addr=0x%x val=0x%08x via write(b)\n", addr, val));
-#ifdef TARGET_WORDS_BIGENDIAN
- rtl8139_io_writeb(opaque, addr, (val >> 24) & 0xff);
- rtl8139_io_writeb(opaque, addr + 1, (val >> 16) & 0xff);
- rtl8139_io_writeb(opaque, addr + 2, (val >> 8) & 0xff);
- rtl8139_io_writeb(opaque, addr + 3, val & 0xff);
-#else
rtl8139_io_writeb(opaque, addr, val & 0xff);
rtl8139_io_writeb(opaque, addr + 1, (val >> 8) & 0xff);
rtl8139_io_writeb(opaque, addr + 2, (val >> 16) & 0xff);
rtl8139_io_writeb(opaque, addr + 3, (val >> 24) & 0xff);
-#endif
break;
}
}
default:
DEBUG_PRINT(("RTL8139: ioport read(w) addr=0x%x via read(b)\n", addr));
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = rtl8139_io_readb(opaque, addr) << 8;
- ret |= rtl8139_io_readb(opaque, addr + 1);
-#else
ret = rtl8139_io_readb(opaque, addr);
ret |= rtl8139_io_readb(opaque, addr + 1) << 8;
-#endif
DEBUG_PRINT(("RTL8139: ioport read(w) addr=0x%x val=0x%04x\n", addr, ret));
break;
default:
DEBUG_PRINT(("RTL8139: ioport read(l) addr=0x%x via read(b)\n", addr));
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = rtl8139_io_readb(opaque, addr) << 24;
- ret |= rtl8139_io_readb(opaque, addr + 1) << 16;
- ret |= rtl8139_io_readb(opaque, addr + 2) << 8;
- ret |= rtl8139_io_readb(opaque, addr + 3);
-#else
ret = rtl8139_io_readb(opaque, addr);
ret |= rtl8139_io_readb(opaque, addr + 1) << 8;
ret |= rtl8139_io_readb(opaque, addr + 2) << 16;
ret |= rtl8139_io_readb(opaque, addr + 3) << 24;
-#endif
DEBUG_PRINT(("RTL8139: read(l) addr=0x%x val=%08x\n", addr, ret));
break;
static void rtl8139_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
{
+#ifdef TARGET_WORDS_BIGENDIAN
+ val = bswap16(val);
+#endif
rtl8139_io_writew(opaque, addr & 0xFF, val);
}
static void rtl8139_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
{
+#ifdef TARGET_WORDS_BIGENDIAN
+ val = bswap32(val);
+#endif
rtl8139_io_writel(opaque, addr & 0xFF, val);
}
static uint32_t rtl8139_mmio_readw(void *opaque, target_phys_addr_t addr)
{
- return rtl8139_io_readw(opaque, addr & 0xFF);
+ uint32_t val = rtl8139_io_readw(opaque, addr & 0xFF);
+#ifdef TARGET_WORDS_BIGENDIAN
+ val = bswap16(val);
+#endif
+ return val;
}
static uint32_t rtl8139_mmio_readl(void *opaque, target_phys_addr_t addr)
{
- return rtl8139_io_readl(opaque, addr & 0xFF);
+ uint32_t val = rtl8139_io_readl(opaque, addr & 0xFF);
+#ifdef TARGET_WORDS_BIGENDIAN
+ val = bswap32(val);
+#endif
+ return val;
}
/* */
static void rtl8139_save(QEMUFile* f,void* opaque)
{
- RTL8139State* s=(RTL8139State*)opaque;
+ RTL8139State* s = opaque;
unsigned int i;
- pci_device_save(s->pci_dev, f);
+ pci_device_save(&s->dev, f);
qemu_put_buffer(f, s->phys, 6);
qemu_put_buffer(f, s->mult, 8);
qemu_put_be64(f, s->TCTR_base);
RTL8139TallyCounters_save(f, &s->tally_counters);
+
+ qemu_put_be32s(f, &s->cplus_enabled);
}
static int rtl8139_load(QEMUFile* f,void* opaque,int version_id)
{
- RTL8139State* s=(RTL8139State*)opaque;
+ RTL8139State* s = opaque;
unsigned int i;
int ret;
/* just 2 versions for now */
- if (version_id > 3)
+ if (version_id > 4)
return -EINVAL;
if (version_id >= 3) {
- ret = pci_device_load(s->pci_dev, f);
+ ret = pci_device_load(&s->dev, f);
if (ret < 0)
return ret;
}
RTL8139TallyCounters_clear(&s->tally_counters);
}
+ if (version_id >= 4) {
+ qemu_get_be32s(f, &s->cplus_enabled);
+ } else {
+ s->cplus_enabled = s->CpCmd != 0;
+ }
+
return 0;
}
/***********************************************************/
/* PCI RTL8139 definitions */
-typedef struct PCIRTL8139State {
- PCIDevice dev;
- RTL8139State rtl8139;
-} PCIRTL8139State;
-
static void rtl8139_mmio_map(PCIDevice *pci_dev, int region_num,
uint32_t addr, uint32_t size, int type)
{
- PCIRTL8139State *d = (PCIRTL8139State *)pci_dev;
- RTL8139State *s = &d->rtl8139;
+ RTL8139State *s = DO_UPCAST(RTL8139State, dev, pci_dev);
cpu_register_physical_memory(addr + 0, 0x100, s->rtl8139_mmio_io_addr);
}
static void rtl8139_ioport_map(PCIDevice *pci_dev, int region_num,
uint32_t addr, uint32_t size, int type)
{
- PCIRTL8139State *d = (PCIRTL8139State *)pci_dev;
- RTL8139State *s = &d->rtl8139;
+ RTL8139State *s = DO_UPCAST(RTL8139State, dev, pci_dev);
register_ioport_write(addr, 0x100, 1, rtl8139_ioport_writeb, s);
register_ioport_read( addr, 0x100, 1, rtl8139_ioport_readb, s);
register_ioport_read( addr, 0x100, 4, rtl8139_ioport_readl, s);
}
-static CPUReadMemoryFunc *rtl8139_mmio_read[3] = {
+static CPUReadMemoryFunc * const rtl8139_mmio_read[3] = {
rtl8139_mmio_readb,
rtl8139_mmio_readw,
rtl8139_mmio_readl,
};
-static CPUWriteMemoryFunc *rtl8139_mmio_write[3] = {
+static CPUWriteMemoryFunc * const rtl8139_mmio_write[3] = {
rtl8139_mmio_writeb,
rtl8139_mmio_writew,
rtl8139_mmio_writel,
static inline int64_t rtl8139_get_next_tctr_time(RTL8139State *s, int64_t current_time)
{
int64_t next_time = current_time +
- muldiv64(1, ticks_per_sec, PCI_FREQUENCY);
+ muldiv64(1, get_ticks_per_sec(), PCI_FREQUENCY);
if (next_time <= current_time)
next_time = current_time + 1;
return next_time;
}
-#if RTL8139_ONBOARD_TIMER
+#ifdef RTL8139_ONBOARD_TIMER
static void rtl8139_timer(void *opaque)
{
RTL8139State *s = opaque;
curr_time = qemu_get_clock(vm_clock);
- curr_tick = muldiv64(curr_time - s->TCTR_base, PCI_FREQUENCY, ticks_per_sec);
+ curr_tick = muldiv64(curr_time - s->TCTR_base, PCI_FREQUENCY,
+ get_ticks_per_sec());
if (s->TimerInt && curr_tick >= s->TimerInt)
{
}
#endif /* RTL8139_ONBOARD_TIMER */
-void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn)
+static void rtl8139_cleanup(VLANClientState *vc)
+{
+ RTL8139State *s = vc->opaque;
+
+ if (s->cplus_txbuffer) {
+ qemu_free(s->cplus_txbuffer);
+ s->cplus_txbuffer = NULL;
+ }
+
+#ifdef RTL8139_ONBOARD_TIMER
+ qemu_del_timer(s->timer);
+ qemu_free_timer(s->timer);
+#endif
+
+ unregister_savevm("rtl8139", s);
+}
+
+static int pci_rtl8139_uninit(PCIDevice *dev)
+{
+ RTL8139State *s = DO_UPCAST(RTL8139State, dev, dev);
+
+ cpu_unregister_io_memory(s->rtl8139_mmio_io_addr);
+
+ return 0;
+}
+
+static int pci_rtl8139_init(PCIDevice *dev)
{
- PCIRTL8139State *d;
- RTL8139State *s;
+ RTL8139State * s = DO_UPCAST(RTL8139State, dev, dev);
uint8_t *pci_conf;
- d = (PCIRTL8139State *)pci_register_device(bus,
- "RTL8139", sizeof(PCIRTL8139State),
- devfn,
- NULL, NULL);
- pci_conf = d->dev.config;
- pci_conf[0x00] = 0xec; /* Realtek 8139 */
- pci_conf[0x01] = 0x10;
- pci_conf[0x02] = 0x39;
- pci_conf[0x03] = 0x81;
+ pci_conf = s->dev.config;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_8139);
pci_conf[0x04] = 0x05; /* command = I/O space, Bus Master */
pci_conf[0x08] = RTL8139_PCI_REVID; /* PCI revision ID; >=0x20 is for 8139C+ */
- pci_conf[0x0a] = 0x00; /* ethernet network controller */
- pci_conf[0x0b] = 0x02;
- pci_conf[0x0e] = 0x00; /* header_type */
+ pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
+ pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; /* header_type */
pci_conf[0x3d] = 1; /* interrupt pin 0 */
pci_conf[0x34] = 0xdc;
- s = &d->rtl8139;
-
/* I/O handler for memory-mapped I/O */
s->rtl8139_mmio_io_addr =
- cpu_register_io_memory(0, rtl8139_mmio_read, rtl8139_mmio_write, s);
+ cpu_register_io_memory(rtl8139_mmio_read, rtl8139_mmio_write, s);
- pci_register_io_region(&d->dev, 0, 0x100,
+ pci_register_bar(&s->dev, 0, 0x100,
PCI_ADDRESS_SPACE_IO, rtl8139_ioport_map);
- pci_register_io_region(&d->dev, 1, 0x100,
+ pci_register_bar(&s->dev, 1, 0x100,
PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map);
- s->pci_dev = (PCIDevice *)d;
- memcpy(s->macaddr, nd->macaddr, 6);
- rtl8139_reset(s);
- s->vc = qemu_new_vlan_client(nd->vlan, rtl8139_receive,
- rtl8139_can_receive, s);
-
- snprintf(s->vc->info_str, sizeof(s->vc->info_str),
- "rtl8139 pci macaddr=%02x:%02x:%02x:%02x:%02x:%02x",
- s->macaddr[0],
- s->macaddr[1],
- s->macaddr[2],
- s->macaddr[3],
- s->macaddr[4],
- s->macaddr[5]);
+ qdev_get_macaddr(&dev->qdev, s->macaddr);
+ rtl8139_reset(&s->dev.qdev);
+ s->vc = qdev_get_vlan_client(&dev->qdev,
+ rtl8139_can_receive, rtl8139_receive, NULL,
+ rtl8139_cleanup, s);
+
+ qemu_format_nic_info_str(s->vc, s->macaddr);
s->cplus_txbuffer = NULL;
s->cplus_txbuffer_len = 0;
s->cplus_txbuffer_offset = 0;
- /* XXX: instance number ? */
- register_savevm("rtl8139", 0, 3, rtl8139_save, rtl8139_load, s);
+ register_savevm("rtl8139", -1, 4, rtl8139_save, rtl8139_load, s);
-#if RTL8139_ONBOARD_TIMER
+#ifdef RTL8139_ONBOARD_TIMER
s->timer = qemu_new_timer(vm_clock, rtl8139_timer, s);
qemu_mod_timer(s->timer,
rtl8139_get_next_tctr_time(s,qemu_get_clock(vm_clock)));
#endif /* RTL8139_ONBOARD_TIMER */
+ return 0;
+}
+
+static PCIDeviceInfo rtl8139_info = {
+ .qdev.name = "rtl8139",
+ .qdev.size = sizeof(RTL8139State),
+ .qdev.reset = rtl8139_reset,
+ .init = pci_rtl8139_init,
+ .exit = pci_rtl8139_uninit,
+};
+
+static void rtl8139_register_devices(void)
+{
+ pci_qdev_register(&rtl8139_info);
}
+device_init(rtl8139_register_devices)
projects / qemu.git / blobdiff