* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
+#include "qemu/osdep.h"
#include "hw/hw.h"
-#include "hw/i386/pc.h"
#include "hw/isa/isa.h"
#include "qemu/timer.h"
#include "hw/timer/i8254.h"
int out;
d = muldiv64(current_time - s->count_load_time, PIT_FREQ,
- get_ticks_per_sec());
+ NANOSECONDS_PER_SECOND);
switch (s->mode) {
default:
case 0:
int period2;
d = muldiv64(current_time - s->count_load_time, PIT_FREQ,
- get_ticks_per_sec());
+ NANOSECONDS_PER_SECOND);
switch (s->mode) {
default:
case 0:
}
break;
case 2:
- base = (d / s->count) * s->count;
+ base = QEMU_ALIGN_DOWN(d, s->count);
if ((d - base) == 0 && d != 0) {
next_time = base + s->count;
} else {
}
break;
case 3:
- base = (d / s->count) * s->count;
+ base = QEMU_ALIGN_DOWN(d, s->count);
period2 = ((s->count + 1) >> 1);
if ((d - base) < period2) {
next_time = base + period2;
break;
}
/* convert to timer units */
- next_time = s->count_load_time + muldiv64(next_time, get_ticks_per_sec(),
+ next_time = s->count_load_time + muldiv64(next_time, NANOSECONDS_PER_SECOND,
PIT_FREQ);
/* fix potential rounding problems */
/* XXX: better solution: use a clock at PIT_FREQ Hz */
.name = "pit channel",
.version_id = 2,
.minimum_version_id = 2,
- .minimum_version_id_old = 2,
.fields = (VMStateField[]) {
VMSTATE_INT32(count, PITChannelState),
VMSTATE_UINT16(latched_count, PITChannelState),
return 0;
}
-static void pit_dispatch_pre_save(void *opaque)
+static int pit_dispatch_pre_save(void *opaque)
{
PITCommonState *s = opaque;
PITCommonClass *c = PIT_COMMON_GET_CLASS(s);
if (c->pre_save) {
c->pre_save(s);
}
+
+ return 0;
}
static int pit_dispatch_post_load(void *opaque, int version_id)
dc->realize = pit_common_realize;
dc->vmsd = &vmstate_pit_common;
- dc->no_user = 1;
+ /*
+ * Reason: unlike ordinary ISA devices, the PIT may need to be
+ * wired to the HPET, and because of that, some wiring is always
+ * done by board code.
+ */
+ dc->user_creatable = false;
}
static const TypeInfo pit_common_type = {