*/
#include "qemu/osdep.h"
+#include "hw/irq.h"
#include "hw/isa/isa.h"
#include "qapi/error.h"
+#include "qemu/module.h"
#include "hw/acpi/tpm.h"
#include "hw/pci/pci_ids.h"
+#include "migration/vmstate.h"
#include "sysemu/tpm_backend.h"
#include "tpm_int.h"
#include "tpm_util.h"
+#include "tpm_ppi.h"
+#include "trace.h"
#define TPM_TIS_NUM_LOCALITIES 5 /* per spec */
#define TPM_TIS_LOCALITY_SHIFT 12
TPMVersion be_tpm_version;
size_t be_buffer_size;
+
+ bool ppi_enabled;
+ TPMPPI ppi;
} TPMState;
#define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS)
#define DEBUG_TIS 0
-#define DPRINTF(fmt, ...) do { \
- if (DEBUG_TIS) { \
- printf(fmt, ## __VA_ARGS__); \
- } \
-} while (0)
-
-/* tis registers */
-#define TPM_TIS_REG_ACCESS 0x00
-#define TPM_TIS_REG_INT_ENABLE 0x08
-#define TPM_TIS_REG_INT_VECTOR 0x0c
-#define TPM_TIS_REG_INT_STATUS 0x10
-#define TPM_TIS_REG_INTF_CAPABILITY 0x14
-#define TPM_TIS_REG_STS 0x18
-#define TPM_TIS_REG_DATA_FIFO 0x24
-#define TPM_TIS_REG_INTERFACE_ID 0x30
-#define TPM_TIS_REG_DATA_XFIFO 0x80
-#define TPM_TIS_REG_DATA_XFIFO_END 0xbc
-#define TPM_TIS_REG_DID_VID 0xf00
-#define TPM_TIS_REG_RID 0xf04
-
-/* vendor-specific registers */
-#define TPM_TIS_REG_DEBUG 0xf90
-
-#define TPM_TIS_STS_TPM_FAMILY_MASK (0x3 << 26)/* TPM 2.0 */
-#define TPM_TIS_STS_TPM_FAMILY1_2 (0 << 26) /* TPM 2.0 */
-#define TPM_TIS_STS_TPM_FAMILY2_0 (1 << 26) /* TPM 2.0 */
-#define TPM_TIS_STS_RESET_ESTABLISHMENT_BIT (1 << 25) /* TPM 2.0 */
-#define TPM_TIS_STS_COMMAND_CANCEL (1 << 24) /* TPM 2.0 */
-
-#define TPM_TIS_STS_VALID (1 << 7)
-#define TPM_TIS_STS_COMMAND_READY (1 << 6)
-#define TPM_TIS_STS_TPM_GO (1 << 5)
-#define TPM_TIS_STS_DATA_AVAILABLE (1 << 4)
-#define TPM_TIS_STS_EXPECT (1 << 3)
-#define TPM_TIS_STS_SELFTEST_DONE (1 << 2)
-#define TPM_TIS_STS_RESPONSE_RETRY (1 << 1)
-
-#define TPM_TIS_BURST_COUNT_SHIFT 8
-#define TPM_TIS_BURST_COUNT(X) \
- ((X) << TPM_TIS_BURST_COUNT_SHIFT)
-
-#define TPM_TIS_ACCESS_TPM_REG_VALID_STS (1 << 7)
-#define TPM_TIS_ACCESS_ACTIVE_LOCALITY (1 << 5)
-#define TPM_TIS_ACCESS_BEEN_SEIZED (1 << 4)
-#define TPM_TIS_ACCESS_SEIZE (1 << 3)
-#define TPM_TIS_ACCESS_PENDING_REQUEST (1 << 2)
-#define TPM_TIS_ACCESS_REQUEST_USE (1 << 1)
-#define TPM_TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0)
-
-#define TPM_TIS_INT_ENABLED (1 << 31)
-#define TPM_TIS_INT_DATA_AVAILABLE (1 << 0)
-#define TPM_TIS_INT_STS_VALID (1 << 1)
-#define TPM_TIS_INT_LOCALITY_CHANGED (1 << 2)
-#define TPM_TIS_INT_COMMAND_READY (1 << 7)
-
-#define TPM_TIS_INT_POLARITY_MASK (3 << 3)
-#define TPM_TIS_INT_POLARITY_LOW_LEVEL (1 << 3)
-
-#define TPM_TIS_INTERRUPTS_SUPPORTED (TPM_TIS_INT_LOCALITY_CHANGED | \
- TPM_TIS_INT_DATA_AVAILABLE | \
- TPM_TIS_INT_STS_VALID | \
- TPM_TIS_INT_COMMAND_READY)
-
-#define TPM_TIS_CAP_INTERFACE_VERSION1_3 (2 << 28)
-#define TPM_TIS_CAP_INTERFACE_VERSION1_3_FOR_TPM2_0 (3 << 28)
-#define TPM_TIS_CAP_DATA_TRANSFER_64B (3 << 9)
-#define TPM_TIS_CAP_DATA_TRANSFER_LEGACY (0 << 9)
-#define TPM_TIS_CAP_BURST_COUNT_DYNAMIC (0 << 8)
-#define TPM_TIS_CAP_INTERRUPT_LOW_LEVEL (1 << 4) /* support is mandatory */
-#define TPM_TIS_CAPABILITIES_SUPPORTED1_3 \
- (TPM_TIS_CAP_INTERRUPT_LOW_LEVEL | \
- TPM_TIS_CAP_BURST_COUNT_DYNAMIC | \
- TPM_TIS_CAP_DATA_TRANSFER_64B | \
- TPM_TIS_CAP_INTERFACE_VERSION1_3 | \
- TPM_TIS_INTERRUPTS_SUPPORTED)
-
-#define TPM_TIS_CAPABILITIES_SUPPORTED2_0 \
- (TPM_TIS_CAP_INTERRUPT_LOW_LEVEL | \
- TPM_TIS_CAP_BURST_COUNT_DYNAMIC | \
- TPM_TIS_CAP_DATA_TRANSFER_64B | \
- TPM_TIS_CAP_INTERFACE_VERSION1_3_FOR_TPM2_0 | \
- TPM_TIS_INTERRUPTS_SUPPORTED)
-
-#define TPM_TIS_IFACE_ID_INTERFACE_TIS1_3 (0xf) /* TPM 2.0 */
-#define TPM_TIS_IFACE_ID_INTERFACE_FIFO (0x0) /* TPM 2.0 */
-#define TPM_TIS_IFACE_ID_INTERFACE_VER_FIFO (0 << 4) /* TPM 2.0 */
-#define TPM_TIS_IFACE_ID_CAP_5_LOCALITIES (1 << 8) /* TPM 2.0 */
-#define TPM_TIS_IFACE_ID_CAP_TIS_SUPPORTED (1 << 13) /* TPM 2.0 */
-#define TPM_TIS_IFACE_ID_INT_SEL_LOCK (1 << 19) /* TPM 2.0 */
-
-#define TPM_TIS_IFACE_ID_SUPPORTED_FLAGS1_3 \
- (TPM_TIS_IFACE_ID_INTERFACE_TIS1_3 | \
- (~0u << 4)/* all of it is don't care */)
-
-/* if backend was a TPM 2.0: */
-#define TPM_TIS_IFACE_ID_SUPPORTED_FLAGS2_0 \
- (TPM_TIS_IFACE_ID_INTERFACE_FIFO | \
- TPM_TIS_IFACE_ID_INTERFACE_VER_FIFO | \
- TPM_TIS_IFACE_ID_CAP_5_LOCALITIES | \
- TPM_TIS_IFACE_ID_CAP_TIS_SUPPORTED)
-
-#define TPM_TIS_TPM_DID 0x0001
-#define TPM_TIS_TPM_VID PCI_VENDOR_ID_IBM
-#define TPM_TIS_TPM_RID 0x0001
-
-#define TPM_TIS_NO_DATA_BYTE 0xff
-
/* local prototypes */
static uint64_t tpm_tis_mmio_read(void *opaque, hwaddr addr,
static void tpm_tis_show_buffer(const unsigned char *buffer,
size_t buffer_size, const char *string)
{
-#ifdef DEBUG_TIS
- uint32_t len, i;
+ size_t len, i;
+ char *line_buffer, *p;
len = MIN(tpm_cmd_get_size(buffer), buffer_size);
- DPRINTF("tpm_tis: %s length = %d\n", string, len);
- for (i = 0; i < len; i++) {
+
+ /*
+ * allocate enough room for 3 chars per buffer entry plus a
+ * newline after every 16 chars and a final null terminator.
+ */
+ line_buffer = g_malloc(len * 3 + (len / 16) + 1);
+
+ for (i = 0, p = line_buffer; i < len; i++) {
if (i && !(i % 16)) {
- DPRINTF("\n");
+ p += sprintf(p, "\n");
}
- DPRINTF("%.2X ", buffer[i]);
+ p += sprintf(p, "%.2X ", buffer[i]);
}
- DPRINTF("\n");
-#endif
+ trace_tpm_tis_show_buffer(string, len, line_buffer);
+
+ g_free(line_buffer);
}
/*
*/
static void tpm_tis_tpm_send(TPMState *s, uint8_t locty)
{
- tpm_tis_show_buffer(s->buffer, s->be_buffer_size,
- "tpm_tis: To TPM");
+ if (trace_event_get_state_backends(TRACE_TPM_TIS_SHOW_BUFFER)) {
+ tpm_tis_show_buffer(s->buffer, s->be_buffer_size, "To TPM");
+ }
/*
* rw_offset serves as length indicator for length of data;
if ((s->loc[locty].inte & TPM_TIS_INT_ENABLED) &&
(s->loc[locty].inte & irqmask)) {
- DPRINTF("tpm_tis: Raising IRQ for flag %08x\n", irqmask);
+ trace_tpm_tis_raise_irq(irqmask);
qemu_irq_raise(s->irq);
s->loc[locty].ints |= irqmask;
}
s->active_locty = new_active_locty;
- DPRINTF("tpm_tis: Active locality is now %d\n", s->active_locty);
+ trace_tpm_tis_new_active_locality(s->active_locty);
if (TPM_TIS_IS_VALID_LOCTY(new_active_locty)) {
/* set flags on the new active locality */
}
/* abort -- this function switches the locality */
-static void tpm_tis_abort(TPMState *s, uint8_t locty)
+static void tpm_tis_abort(TPMState *s)
{
s->rw_offset = 0;
- DPRINTF("tpm_tis: tis_abort: new active locality is %d\n", s->next_locty);
+ trace_tpm_tis_abort(s->next_locty);
/*
* Need to react differently depending on who's aborting now and
{
uint8_t busy_locty;
- s->aborting_locty = locty;
+ assert(TPM_TIS_IS_VALID_LOCTY(newlocty));
+
+ s->aborting_locty = locty; /* may also be TPM_TIS_NO_LOCALITY */
s->next_locty = newlocty; /* locality after successful abort */
/*
}
}
- tpm_tis_abort(s, locty);
+ tpm_tis_abort(s);
}
/*
uint8_t locty = s->cmd.locty;
uint8_t l;
+ assert(TPM_TIS_IS_VALID_LOCTY(locty));
+
if (s->cmd.selftest_done) {
for (l = 0; l < TPM_TIS_NUM_LOCALITIES; l++) {
- s->loc[locty].sts |= TPM_TIS_STS_SELFTEST_DONE;
+ s->loc[l].sts |= TPM_TIS_STS_SELFTEST_DONE;
}
}
s->loc[locty].state = TPM_TIS_STATE_COMPLETION;
s->rw_offset = 0;
- tpm_tis_show_buffer(s->buffer, s->be_buffer_size,
- "tpm_tis: From TPM");
+ if (trace_event_get_state_backends(TRACE_TPM_TIS_SHOW_BUFFER)) {
+ tpm_tis_show_buffer(s->buffer, s->be_buffer_size, "From TPM");
+ }
if (TPM_TIS_IS_VALID_LOCTY(s->next_locty)) {
- tpm_tis_abort(s, locty);
+ tpm_tis_abort(s);
}
tpm_tis_raise_irq(s, locty,
tpm_tis_sts_set(&s->loc[locty], TPM_TIS_STS_VALID);
tpm_tis_raise_irq(s, locty, TPM_TIS_INT_STS_VALID);
}
- DPRINTF("tpm_tis: tpm_tis_data_read byte 0x%02x [%d]\n",
- ret, s->rw_offset - 1);
+ trace_tpm_tis_data_read(ret, s->rw_offset - 1);
}
return ret;
hwaddr base = addr & ~0xfff;
TPMState *s = opaque;
- DPRINTF("tpm_tis: active locality : %d\n"
- "tpm_tis: state of locality %d : %d\n"
- "tpm_tis: register dump:\n",
- s->active_locty,
- locty, s->loc[locty].state);
+ printf("tpm_tis: active locality : %d\n"
+ "tpm_tis: state of locality %d : %d\n"
+ "tpm_tis: register dump:\n",
+ s->active_locty,
+ locty, s->loc[locty].state);
for (idx = 0; regs[idx] != 0xfff; idx++) {
- DPRINTF("tpm_tis: 0x%04x : 0x%08x\n", regs[idx],
- (int)tpm_tis_mmio_read(opaque, base + regs[idx], 4));
+ printf("tpm_tis: 0x%04x : 0x%08x\n", regs[idx],
+ (int)tpm_tis_mmio_read(opaque, base + regs[idx], 4));
}
- DPRINTF("tpm_tis: r/w offset : %d\n"
- "tpm_tis: result buffer : ",
- s->rw_offset);
+ printf("tpm_tis: r/w offset : %d\n"
+ "tpm_tis: result buffer : ",
+ s->rw_offset);
for (idx = 0;
idx < MIN(tpm_cmd_get_size(&s->buffer), s->be_buffer_size);
idx++) {
- DPRINTF("%c%02x%s",
- s->rw_offset == idx ? '>' : ' ',
- s->buffer[idx],
- ((idx & 0xf) == 0xf) ? "\ntpm_tis: " : "");
+ printf("%c%02x%s",
+ s->rw_offset == idx ? '>' : ' ',
+ s->buffer[idx],
+ ((idx & 0xf) == 0xf) ? "\ntpm_tis: " : "");
}
- DPRINTF("\n");
+ printf("\n");
}
#endif
val >>= shift;
}
- DPRINTF("tpm_tis: read.%u(%08x) = %08x\n", size, (int)addr, (int)val);
+ trace_tpm_tis_mmio_read(size, addr, val);
return val;
}
uint16_t len;
uint32_t mask = (size == 1) ? 0xff : ((size == 2) ? 0xffff : ~0);
- DPRINTF("tpm_tis: write.%u(%08x) = %08x\n", size, (int)addr, (int)val);
+ trace_tpm_tis_mmio_write(size, addr, val);
if (locty == 4) {
- DPRINTF("tpm_tis: Access to locality 4 only allowed from hardware\n");
+ trace_tpm_tis_mmio_write_locty4();
return;
}
if ((val & TPM_TIS_ACCESS_ACTIVE_LOCALITY)) {
/* give up locality if currently owned */
if (s->active_locty == locty) {
- DPRINTF("tpm_tis: Releasing locality %d\n", locty);
+ trace_tpm_tis_mmio_write_release_locty(locty);
uint8_t newlocty = TPM_TIS_NO_LOCALITY;
/* anybody wants the locality ? */
for (c = TPM_TIS_NUM_LOCALITIES - 1; c >= 0; c--) {
if ((s->loc[c].access & TPM_TIS_ACCESS_REQUEST_USE)) {
- DPRINTF("tpm_tis: Locality %d requests use.\n", c);
+ trace_tpm_tis_mmio_write_locty_req_use(c);
newlocty = c;
break;
}
}
- DPRINTF("tpm_tis: TPM_TIS_ACCESS_ACTIVE_LOCALITY: "
- "Next active locality: %d\n",
- newlocty);
+ trace_tpm_tis_mmio_write_next_locty(newlocty);
if (TPM_TIS_IS_VALID_LOCTY(newlocty)) {
set_new_locty = 0;
}
/* cancel any seize by a lower locality */
- for (l = 0; l < locty - 1; l++) {
+ for (l = 0; l < locty; l++) {
s->loc[l].access &= ~TPM_TIS_ACCESS_SEIZE;
}
s->loc[locty].access |= TPM_TIS_ACCESS_SEIZE;
- DPRINTF("tpm_tis: TPM_TIS_ACCESS_SEIZE: "
- "Locality %d seized from locality %d\n",
- locty, s->active_locty);
- DPRINTF("tpm_tis: TPM_TIS_ACCESS_SEIZE: Initiating abort.\n");
+
+ trace_tpm_tis_mmio_write_locty_seized(locty, s->active_locty);
+ trace_tpm_tis_mmio_write_init_abort();
+
set_new_locty = 0;
tpm_tis_prep_abort(s, s->active_locty, locty);
break;
s->loc[locty].ints &= ~val;
if (s->loc[locty].ints == 0) {
qemu_irq_lower(s->irq);
- DPRINTF("tpm_tis: Lowering IRQ\n");
+ trace_tpm_tis_mmio_write_lowering_irq();
}
}
s->loc[locty].ints &= ~(val & TPM_TIS_INTERRUPTS_SUPPORTED);
case TPM_TIS_STATE_EXECUTION:
case TPM_TIS_STATE_RECEPTION:
/* abort currently running command */
- DPRINTF("tpm_tis: %s: Initiating abort.\n",
- __func__);
+ trace_tpm_tis_mmio_write_init_abort();
tpm_tis_prep_abort(s, locty, locty);
break;
s->loc[locty].state == TPM_TIS_STATE_COMPLETION) {
/* drop the byte */
} else {
- DPRINTF("tpm_tis: Data to send to TPM: %08x (size=%d)\n",
- (int)val, size);
+ trace_tpm_tis_mmio_write_data2send(val, size);
if (s->loc[locty].state == TPM_TIS_STATE_READY) {
s->loc[locty].state = TPM_TIS_STATE_RECEPTION;
tpm_tis_sts_set(&s->loc[locty],
s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->be_driver),
TPM_TIS_BUFFER_MAX);
+ if (s->ppi_enabled) {
+ tpm_ppi_reset(&s->ppi);
+ }
tpm_backend_reset(s->be_driver);
s->active_locty = TPM_TIS_NO_LOCALITY;
s->rw_offset = 0;
}
- tpm_backend_startup_tpm(s->be_driver, s->be_buffer_size);
+ if (tpm_backend_startup_tpm(s->be_driver, s->be_buffer_size) < 0) {
+ exit(1);
+ }
+}
+
+/* persistent state handling */
+
+static int tpm_tis_pre_save(void *opaque)
+{
+ TPMState *s = opaque;
+ uint8_t locty = s->active_locty;
+
+ trace_tpm_tis_pre_save(locty, s->rw_offset);
+
+ if (DEBUG_TIS) {
+ tpm_tis_dump_state(opaque, 0);
+ }
+
+ /*
+ * Synchronize with backend completion.
+ */
+ tpm_backend_finish_sync(s->be_driver);
+
+ return 0;
}
+static const VMStateDescription vmstate_locty = {
+ .name = "tpm-tis/locty",
+ .version_id = 0,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(state, TPMLocality),
+ VMSTATE_UINT32(inte, TPMLocality),
+ VMSTATE_UINT32(ints, TPMLocality),
+ VMSTATE_UINT8(access, TPMLocality),
+ VMSTATE_UINT32(sts, TPMLocality),
+ VMSTATE_UINT32(iface_id, TPMLocality),
+ VMSTATE_END_OF_LIST(),
+ }
+};
+
static const VMStateDescription vmstate_tpm_tis = {
- .name = "tpm",
- .unmigratable = 1,
+ .name = "tpm-tis",
+ .version_id = 0,
+ .pre_save = tpm_tis_pre_save,
+ .fields = (VMStateField[]) {
+ VMSTATE_BUFFER(buffer, TPMState),
+ VMSTATE_UINT16(rw_offset, TPMState),
+ VMSTATE_UINT8(active_locty, TPMState),
+ VMSTATE_UINT8(aborting_locty, TPMState),
+ VMSTATE_UINT8(next_locty, TPMState),
+
+ VMSTATE_STRUCT_ARRAY(loc, TPMState, TPM_TIS_NUM_LOCALITIES, 0,
+ vmstate_locty, TPMLocality),
+
+ VMSTATE_END_OF_LIST()
+ }
};
static Property tpm_tis_properties[] = {
DEFINE_PROP_UINT32("irq", TPMState, irq_num, TPM_TIS_IRQ),
DEFINE_PROP_TPMBE("tpmdev", TPMState, be_driver),
+ DEFINE_PROP_BOOL("ppi", TPMState, ppi_enabled, true),
DEFINE_PROP_END_OF_LIST(),
};
memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
TPM_TIS_ADDR_BASE, &s->mmio);
+
+ if (s->ppi_enabled) {
+ tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),
+ TPM_PPI_ADDR_BASE, OBJECT(s));
+ }
}
static void tpm_tis_initfn(Object *obj)
projects / qemu.git / blobdiff