target/loongarch: Add fixed point atomic instruction translation

[qemu.git] / target / loongarch / translate.c

diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
index b8fed2669983a110dcc07ab070de0b0cc532df1b..01791bf1a20735d5f4d9fdc400ec3adfa939e912 100644 (file)
--- a/target/loongarch/translate.c
+++ b/target/loongarch/translate.c
@@ -154,6 +154,7 @@ static void gen_set_gpr(int reg_num, TCGv t, DisasExtend dst_ext)
 #include "insn_trans/trans_shift.c.inc"
 #include "insn_trans/trans_bit.c.inc"
 #include "insn_trans/trans_memory.c.inc"
+#include "insn_trans/trans_atomic.c.inc"
 
 static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
 {