qdev: set properties with device_class_set_props()

[qemu.git] / hw / arm / strongarm.c

diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 3d1a231d9ea25afa3e000eb65aa621deadce7e24..cd8a99aaf2e411cfcba98f15d20a54c4b45f4856 100644 (file)
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -28,12 +28,16 @@
  */
 
 #include "qemu/osdep.h"
  */
 
 #include "qemu/osdep.h"

+#include "qemu-common.h"

 #include "cpu.h"
 #include "hw/boards.h"
 #include "cpu.h"
 #include "hw/boards.h"

+#include "hw/irq.h"
+#include "hw/qdev-properties.h"

 #include "hw/sysbus.h"
 #include "hw/sysbus.h"

+#include "migration/vmstate.h"

 #include "strongarm.h"
 #include "qemu/error-report.h"
 #include "strongarm.h"
 #include "qemu/error-report.h"

-#include "hw/arm/arm.h"
+#include "hw/arm/boot.h"

 #include "chardev/char-fe.h"
 #include "chardev/char-serial.h"
 #include "sysemu/sysemu.h"
 #include "chardev/char-fe.h"
 #include "chardev/char-serial.h"
 #include "sysemu/sysemu.h"


@@ -406,11 +410,13 @@ static void strongarm_rtc_init(Object *obj)
     sysbus_init_mmio(dev, &s->iomem);
 }
 
     sysbus_init_mmio(dev, &s->iomem);
 }
 

-static void strongarm_rtc_pre_save(void *opaque)
+static int strongarm_rtc_pre_save(void *opaque)

 {
     StrongARMRTCState *s = opaque;
 
     strongarm_rtc_hzupdate(s);
 {
     StrongARMRTCState *s = opaque;
 
     strongarm_rtc_hzupdate(s);

+
+    return 0;

 }
 
 static int strongarm_rtc_post_load(void *opaque, int version_id)
 }
 
 static int strongarm_rtc_post_load(void *opaque, int version_id)


@@ -585,12 +591,12 @@ static void strongarm_gpio_write(void *opaque, hwaddr offset,
 
     switch (offset) {
     case GPDR:        /* GPIO Pin-Direction registers */
 
     switch (offset) {
     case GPDR:        /* GPIO Pin-Direction registers */

-        s->dir = value;
+        s->dir = value & 0x0fffffff;

         strongarm_gpio_handler_update(s);
         break;
 
     case GPSR:        /* GPIO Pin-Output Set registers */
         strongarm_gpio_handler_update(s);
         break;
 
     case GPSR:        /* GPIO Pin-Output Set registers */

-        s->olevel |= value;
+        s->olevel |= value & 0x0fffffff;

         strongarm_gpio_handler_update(s);
         break;
 
         strongarm_gpio_handler_update(s);
         break;
 


@@ -1087,7 +1093,7 @@ static void strongarm_uart_receive(void *opaque, const uint8_t *buf, int size)
     strongarm_uart_update_int_status(s);
 }
 
     strongarm_uart_update_int_status(s);
 }
 

-static void strongarm_uart_event(void *opaque, int event)
+static void strongarm_uart_event(void *opaque, QEMUChrEvent event)

 {
     StrongARMUARTState *s = opaque;
     if (event == CHR_EVENT_BREAK) {
 {
     StrongARMUARTState *s = opaque;
     if (event == CHR_EVENT_BREAK) {


@@ -1321,7 +1327,7 @@ static void strongarm_uart_class_init(ObjectClass *klass, void *data)
     dc->desc = "StrongARM UART controller";
     dc->reset = strongarm_uart_reset;
     dc->vmsd = &vmstate_strongarm_uart_regs;
     dc->desc = "StrongARM UART controller";
     dc->reset = strongarm_uart_reset;
     dc->vmsd = &vmstate_strongarm_uart_regs;

-    dc->props = strongarm_uart_properties;
+    device_class_set_props(dc, strongarm_uart_properties);

     dc->realize = strongarm_uart_realize;
 }
 
     dc->realize = strongarm_uart_realize;
 }
 


@@ -1580,8 +1586,7 @@ static const TypeInfo strongarm_ssp_info = {
 };
 
 /* Main CPU functions */
 };
 
 /* Main CPU functions */

-StrongARMState *sa1110_init(MemoryRegion *sysmem,
-                            unsigned int sdram_size, const char *cpu_type)
+StrongARMState *sa1110_init(const char *cpu_type)

 {
     StrongARMState *s;
     int i;
 {
     StrongARMState *s;
     int i;


@@ -1595,10 +1600,6 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
 
     s->cpu = ARM_CPU(cpu_create(cpu_type));
 
 
     s->cpu = ARM_CPU(cpu_create(cpu_type));
 

-    memory_region_allocate_system_memory(&s->sdram, NULL, "strongarm.sdram",
-                                         sdram_size);
-    memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
-

     s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
                     qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ),
                     qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ),
     s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
                     qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ),
                     qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ),


@@ -1620,7 +1621,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
 
     for (i = 0; sa_serial[i].io_base; i++) {
         DeviceState *dev = qdev_create(NULL, TYPE_STRONGARM_UART);
 
     for (i = 0; sa_serial[i].io_base; i++) {
         DeviceState *dev = qdev_create(NULL, TYPE_STRONGARM_UART);

-        qdev_prop_set_chr(dev, "chardev", serial_hds[i]);
+        qdev_prop_set_chr(dev, "chardev", serial_hd(i));

         qdev_init_nofail(dev);
         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
                 sa_serial[i].io_base);
         qdev_init_nofail(dev);
         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0,
                 sa_serial[i].io_base);