Call most FP helpers without deroute through op.c

[qemu.git] / softmmu_template.h

diff --git a/softmmu_template.h b/softmmu_template.h
index f1abee8ac8db0100ab8d49170dc0f0a278d826f3..934df5286fd52d178b262bc3501617188dee8de1 100644 (file)
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -1,6 +1,6 @@
 /*
  *  Software MMU support
 /*
  *  Software MMU support

- * 
+ *

  *  Copyright (c) 2003 Fabrice Bellard
  *
  * This library is free software; you can redistribute it and/or
  *  Copyright (c) 2003 Fabrice Bellard
  *
  * This library is free software; you can redistribute it and/or


@@ -41,20 +41,23 @@
 
 #ifdef SOFTMMU_CODE_ACCESS
 #define READ_ACCESS_TYPE 2
 
 #ifdef SOFTMMU_CODE_ACCESS
 #define READ_ACCESS_TYPE 2

+#define ADDR_READ addr_code

 #else
 #define READ_ACCESS_TYPE 0
 #else
 #define READ_ACCESS_TYPE 0

+#define ADDR_READ addr_read

 #endif
 
 #endif
 

-static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, 
-                                                        int is_user,
+static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
+                                                        int mmu_idx,

                                                         void *retaddr);
                                                         void *retaddr);

-static inline DATA_TYPE glue(io_read, SUFFIX)(unsigned long physaddr, 
-                                              unsigned long tlb_addr)
+static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
+                                              target_ulong addr)

 {
     DATA_TYPE res;
     int index;
 {
     DATA_TYPE res;
     int index;

+    index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
+    physaddr = (physaddr & TARGET_PAGE_MASK) + addr;

 
 

-    index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

 #if SHIFT <= 2
     res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr);
 #else
 #if SHIFT <= 2
     res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr);
 #else


@@ -66,77 +69,96 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(unsigned long physaddr,
     res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32;
 #endif
 #endif /* SHIFT > 2 */
     res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32;
 #endif
 #endif /* SHIFT > 2 */

+#ifdef USE_KQEMU
+    env->last_io_time = cpu_get_time_fast();
+#endif

     return res;
 }
 
 /* handle all cases except unaligned access which span two pages */
     return res;
 }
 
 /* handle all cases except unaligned access which span two pages */

-DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
-                                                         int is_user)
+DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
+                                                      int mmu_idx)

 {
     DATA_TYPE res;
     int index;
 {
     DATA_TYPE res;
     int index;

-    unsigned long physaddr, tlb_addr;
+    target_ulong tlb_addr;
+    target_phys_addr_t addend;

     void *retaddr;
     void *retaddr;

-    
+

     /* test if there is match for unaligned or IO access */
     /* XXX: could done more in memory macro in a non portable way */
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:
     /* test if there is match for unaligned or IO access */
     /* XXX: could done more in memory macro in a non portable way */
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:

-    tlb_addr = env->tlb_read[is_user][index].address;
+    tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;

     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

-        physaddr = addr + env->tlb_read[is_user][index].addend;

         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;
         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;

-            res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
-        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
+            addend = env->iotlb[mmu_idx][index];
+            res = glue(io_read, SUFFIX)(addend, addr);
+        } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {

             /* slow unaligned access (it spans two pages or IO) */
         do_unaligned_access:
             retaddr = GETPC();
             /* slow unaligned access (it spans two pages or IO) */
         do_unaligned_access:
             retaddr = GETPC();

-            res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, 
-                                                         is_user, retaddr);
+#ifdef ALIGNED_ONLY
+            do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+#endif
+            res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr,
+                                                         mmu_idx, retaddr);

         } else {
         } else {

-            /* unaligned access in the same page */
-            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
+            /* unaligned/aligned access in the same page */
+#ifdef ALIGNED_ONLY
+            if ((addr & (DATA_SIZE - 1)) != 0) {
+                retaddr = GETPC();
+                do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+            }
+#endif
+            addend = env->tlb_table[mmu_idx][index].addend;
+            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));

         }
     } else {
         /* the page is not in the TLB : fill it */
         retaddr = GETPC();
         }
     } else {
         /* the page is not in the TLB : fill it */
         retaddr = GETPC();

-        tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr);
+#ifdef ALIGNED_ONLY
+        if ((addr & (DATA_SIZE - 1)) != 0)
+            do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+#endif
+        tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);

         goto redo;
     }
     return res;
 }
 
 /* handle all unaligned cases */
         goto redo;
     }
     return res;
 }
 
 /* handle all unaligned cases */

-static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, 
-                                                        int is_user,
+static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
+                                                        int mmu_idx,

                                                         void *retaddr)
 {
     DATA_TYPE res, res1, res2;
     int index, shift;
                                                         void *retaddr)
 {
     DATA_TYPE res, res1, res2;
     int index, shift;

-    unsigned long physaddr, tlb_addr, addr1, addr2;
+    target_phys_addr_t addend;
+    target_ulong tlb_addr, addr1, addr2;

 
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:
 
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:

-    tlb_addr = env->tlb_read[is_user][index].address;
+    tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;

     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

-        physaddr = addr + env->tlb_read[is_user][index].addend;

         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;
         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;

-            res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
-        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
+            addend = env->iotlb[mmu_idx][index];
+            res = glue(io_read, SUFFIX)(addend, addr);
+        } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {

         do_unaligned_access:
             /* slow unaligned access (it spans two pages) */
             addr1 = addr & ~(DATA_SIZE - 1);
             addr2 = addr1 + DATA_SIZE;
         do_unaligned_access:
             /* slow unaligned access (it spans two pages) */
             addr1 = addr & ~(DATA_SIZE - 1);
             addr2 = addr1 + DATA_SIZE;

-            res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, 
-                                                          is_user, retaddr);
-            res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, 
-                                                          is_user, retaddr);
+            res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1,
+                                                          mmu_idx, retaddr);
+            res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2,
+                                                          mmu_idx, retaddr);

             shift = (addr & (DATA_SIZE - 1)) * 8;
 #ifdef TARGET_WORDS_BIGENDIAN
             res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
             shift = (addr & (DATA_SIZE - 1)) * 8;
 #ifdef TARGET_WORDS_BIGENDIAN
             res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));


@@ -146,11 +168,12 @@ static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
             res = (DATA_TYPE)res;
         } else {
             /* unaligned/aligned access in the same page */
             res = (DATA_TYPE)res;
         } else {
             /* unaligned/aligned access in the same page */

-            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
+            addend = env->tlb_table[mmu_idx][index].addend;
+            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));

         }
     } else {
         /* the page is not in the TLB : fill it */
         }
     } else {
         /* the page is not in the TLB : fill it */

-        tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr);
+        tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);

         goto redo;
     }
     return res;
         goto redo;
     }
     return res;


@@ -158,20 +181,21 @@ static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
 
 #ifndef SOFTMMU_CODE_ACCESS
 
 
 #ifndef SOFTMMU_CODE_ACCESS
 

-static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, 
-                                                   DATA_TYPE val, 
-                                                   int is_user,
+static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
+                                                   DATA_TYPE val,
+                                                   int mmu_idx,

                                                    void *retaddr);
 
                                                    void *retaddr);
 

-static inline void glue(io_write, SUFFIX)(unsigned long physaddr, 
+static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,

                                           DATA_TYPE val,
                                           DATA_TYPE val,

-                                          unsigned long tlb_addr,
+                                          target_ulong addr,

                                           void *retaddr)
 {
     int index;
                                           void *retaddr)
 {
     int index;

+    index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
+    physaddr = (physaddr & TARGET_PAGE_MASK) + addr;

 
 

-    index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
-    env->mem_write_vaddr = tlb_addr;
+    env->mem_write_vaddr = addr;

     env->mem_write_pc = (unsigned long)retaddr;
 #if SHIFT <= 2
     io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);
     env->mem_write_pc = (unsigned long)retaddr;
 #if SHIFT <= 2
     io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);


@@ -184,82 +208,104 @@ static inline void glue(io_write, SUFFIX)(unsigned long physaddr,
     io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32);
 #endif
 #endif /* SHIFT > 2 */
     io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32);
 #endif
 #endif /* SHIFT > 2 */

+#ifdef USE_KQEMU
+    env->last_io_time = cpu_get_time_fast();
+#endif

 }
 
 }
 

-void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(unsigned long addr, 
-                                                    DATA_TYPE val,
-                                                    int is_user)
+void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
+                                                 DATA_TYPE val,
+                                                 int mmu_idx)

 {
 {

-    unsigned long physaddr, tlb_addr;
+    target_phys_addr_t addend;
+    target_ulong tlb_addr;

     void *retaddr;
     int index;
     void *retaddr;
     int index;

-    
+

     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:

-    tlb_addr = env->tlb_write[is_user][index].address;
+    tlb_addr = env->tlb_table[mmu_idx][index].addr_write;

     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

-        physaddr = addr + env->tlb_write[is_user][index].addend;

         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;
             retaddr = GETPC();
         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;
             retaddr = GETPC();

-            glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
-        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
+            addend = env->iotlb[mmu_idx][index];
+            glue(io_write, SUFFIX)(addend, val, addr, retaddr);
+        } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {

         do_unaligned_access:
             retaddr = GETPC();
         do_unaligned_access:
             retaddr = GETPC();

-            glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, 
-                                                   is_user, retaddr);
+#ifdef ALIGNED_ONLY
+            do_unaligned_access(addr, 1, mmu_idx, retaddr);
+#endif
+            glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val,
+                                                   mmu_idx, retaddr);

         } else {
             /* aligned/unaligned access in the same page */
         } else {
             /* aligned/unaligned access in the same page */

-            glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val);
+#ifdef ALIGNED_ONLY
+            if ((addr & (DATA_SIZE - 1)) != 0) {
+                retaddr = GETPC();
+                do_unaligned_access(addr, 1, mmu_idx, retaddr);
+            }
+#endif
+            addend = env->tlb_table[mmu_idx][index].addend;
+            glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);

         }
     } else {
         /* the page is not in the TLB : fill it */
         retaddr = GETPC();
         }
     } else {
         /* the page is not in the TLB : fill it */
         retaddr = GETPC();

-        tlb_fill(addr, 1, is_user, retaddr);
+#ifdef ALIGNED_ONLY
+        if ((addr & (DATA_SIZE - 1)) != 0)
+            do_unaligned_access(addr, 1, mmu_idx, retaddr);
+#endif
+        tlb_fill(addr, 1, mmu_idx, retaddr);

         goto redo;
     }
 }
 
 /* handles all unaligned cases */
         goto redo;
     }
 }
 
 /* handles all unaligned cases */

-static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, 
+static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,

                                                    DATA_TYPE val,
                                                    DATA_TYPE val,

-                                                   int is_user,
+                                                   int mmu_idx,

                                                    void *retaddr)
 {
                                                    void *retaddr)
 {

-    unsigned long physaddr, tlb_addr;
+    target_phys_addr_t addend;
+    target_ulong tlb_addr;

     int index, i;
 
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:
     int index, i;
 
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
  redo:

-    tlb_addr = env->tlb_write[is_user][index].address;
+    tlb_addr = env->tlb_table[mmu_idx][index].addr_write;

     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {

-        physaddr = addr + env->tlb_write[is_user][index].addend;

         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;
         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
                 goto do_unaligned_access;

-            glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
-        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
+            addend = env->iotlb[mmu_idx][index];
+            glue(io_write, SUFFIX)(addend, val, addr, retaddr);
+        } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {

         do_unaligned_access:
             /* XXX: not efficient, but simple */
         do_unaligned_access:
             /* XXX: not efficient, but simple */

-            for(i = 0;i < DATA_SIZE; i++) {
+            /* Note: relies on the fact that tlb_fill() does not remove the
+             * previous page from the TLB cache.  */
+            for(i = DATA_SIZE - 1; i >= 0; i--) {

 #ifdef TARGET_WORDS_BIGENDIAN
 #ifdef TARGET_WORDS_BIGENDIAN

-                glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), 
-                                          is_user, retaddr);
+                glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)),
+                                          mmu_idx, retaddr);

 #else
 #else

-                glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), 
-                                          is_user, retaddr);
+                glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
+                                          mmu_idx, retaddr);

 #endif
             }
         } else {
             /* aligned/unaligned access in the same page */
 #endif
             }
         } else {
             /* aligned/unaligned access in the same page */

-            glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val);
+            addend = env->tlb_table[mmu_idx][index].addend;
+            glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);

         }
     } else {
         /* the page is not in the TLB : fill it */
         }
     } else {
         /* the page is not in the TLB : fill it */

-        tlb_fill(addr, 1, is_user, retaddr);
+        tlb_fill(addr, 1, mmu_idx, retaddr);

         goto redo;
     }
 }
         goto redo;
     }
 }


@@ -272,3 +318,4 @@ static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr,
 #undef SUFFIX
 #undef USUFFIX
 #undef DATA_SIZE
 #undef SUFFIX
 #undef USUFFIX
 #undef DATA_SIZE

+#undef ADDR_READ