* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include "vl.h"
+#include "hw.h"
+#include "isa.h"
+#include "pc.h"
+#include "ps2.h"
+#include "sysemu.h"
/* debug PC keyboard */
//#define DEBUG_KBD
-/* debug PC keyboard : only mouse */
-//#define DEBUG_MOUSE
-
/* Keyboard Controller Commands */
#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
#define MOUSE_STATUS_ENABLED 0x20
#define MOUSE_STATUS_SCALE21 0x10
-#define KBD_QUEUE_SIZE 256
-
#define KBD_PENDING_KBD 1
#define KBD_PENDING_AUX 2
qemu_irq irq_kbd;
qemu_irq irq_mouse;
- target_phys_addr_t base;
- int it_shift;
+ target_phys_addr_t mask;
} KBDState;
-KBDState kbd_state;
+static KBDState kbd_state;
/* update irq and KBD_STAT_[MOUSE_]OBF */
/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
#endif
switch(val) {
case KBD_CCMD_READ_MODE:
- kbd_queue(s, s->mode, 1);
+ kbd_queue(s, s->mode, 0);
break;
case KBD_CCMD_WRITE_MODE:
case KBD_CCMD_WRITE_OBUF:
static uint32_t kbd_read_data(void *opaque, uint32_t addr)
{
KBDState *s = opaque;
+ uint32_t val;
if (s->pending == KBD_PENDING_AUX)
- return ps2_read_data(s->mouse);
+ val = ps2_read_data(s->mouse);
+ else
+ val = ps2_read_data(s->kbd);
- return ps2_read_data(s->kbd);
+#if defined(DEBUG_KBD)
+ printf("kbd: read data=0x%02x\n", val);
+#endif
+ return val;
}
-void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
+static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
{
KBDState *s = opaque;
}
/* Memory mapped interface */
-uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
+static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
{
KBDState *s = opaque;
- switch ((addr - s->base) >> s->it_shift) {
- case 0:
- return kbd_read_data(s, 0) & 0xff;
- case 1:
+ if (addr & s->mask)
return kbd_read_status(s, 0) & 0xff;
- default:
- return 0xff;
- }
+ else
+ return kbd_read_data(s, 0) & 0xff;
}
-void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
{
KBDState *s = opaque;
- switch ((addr - s->base) >> s->it_shift) {
- case 0:
- kbd_write_data(s, 0, value & 0xff);
- break;
- case 1:
+ if (addr & s->mask)
kbd_write_command(s, 0, value & 0xff);
- break;
- }
+ else
+ kbd_write_data(s, 0, value & 0xff);
}
static CPUReadMemoryFunc *kbd_mm_read[] = {
};
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, int it_shift)
+ target_phys_addr_t base, ram_addr_t size,
+ target_phys_addr_t mask)
{
KBDState *s = &kbd_state;
int s_io_memory;
s->irq_kbd = kbd_irq;
s->irq_mouse = mouse_irq;
- s->base = base;
- s->it_shift = it_shift;
+ s->mask = mask;
kbd_reset(s);
register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
- s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
- cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
+ s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
+ cpu_register_physical_memory(base, size, s_io_memory);
s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);